Renesas F-ZTAT H8 Series, Hardware Manual

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6. ROM
Rev.3.00 Jul. 19, 2007 page 145 of 532
REJ09B0397-0300
6.6 Flash Memory Protection
There are three kinds of flash memory program/erase protection: hardware, software, and error
protection.
6.6.1 Hardware Protection
Hardware protection refers to a state in which programming/erasing of flash memory is forcibly
disabled or aborted. In this state, the settings in flash memory control registers 1 and 2 (FLMCR1,
FLMCR2) and the erase block register (EBR) are reset. (See table 6.7.)
Table 6.7 Hardware Protection
Functions
Item Description Program Erase Verify *
1
FWE pin
protection
•
When a low level is input to the FWE pin,
FLMCR1, FLMCR2 (except the FLER bit),
and EBR are initialized, and the
program/erase-protected state is entered. *
3
Not
possible Not
possible
*
2
Not
possible
Reset/standby
protection
•
In a reset (including a WDT overflow reset)
and in standby mode, FLMCR1, FLMCR2,
and EBR are initialized, and the program/
erase-protected state is entered.
•
In a reset via the
RES
pin, the reset state is
not entered unless the
RES
pin is held low
for a minimum of 40 ms (oscillation
stabilization time)
*
4
after powering on. In the
case of a reset during operation, hold the
RES
pin low for a minimum of 10 system
clock cycles (10
φ
).
Not
possible Not
possible
*
2
Not
possible
Notes: 1. Two modes: program-verify and erase-verify.
2. All blocks are unerasable and block-by-block specification is not possible.
3. For details see section 6.9, Flash Memory Programming and Erasing Precautions.
4. For details see the AC characteristics in sections 15.2.3 and 16.2.3, Electrical
Characteristics.