12. A/D Converter
Rev.3.00 Jul. 19, 2007 page 325 of 532
REJ09B0397-0300
Start
Set A/D conversion speed
and input channels
Enable A/D conversion
end interrupt
Start A/D conversion
A/D conversion
end interrupt?
Yes
No
End
Yes
No
Clear bit IRRAD to
0 in IRR2
Read ADRR data
Perform A/D
conversion?
Figure 12.5 Flow Chart of Procedure for Using A/D Converter (2) (Interrupts Used)
12.6 Application
Notes
•
Data in the A/D result register (ADRR) should be read only when the A/D start flag (ADSF) in
the A/D start register (ADSR) is cleared to 0.
•
Changing the digital input signal at an adjacent pin during A/D conversion may adversely
affect conversion accuracy.
Summary of Contents for F-ZTAT H8 Series
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