2. CPU
Rev.3.00 Jul. 19, 2007 page 50 of 532
REJ09B0397-0300
Legend:
op:
rm, rn:
abs:
IMM:
Operation field
Register field
Absolute address
Immediate data
15
0
8
7
op
IMM
rn
Operand:
Bit No.:
register direct (Rn)
immediate (#xx:3)
BIAND, BIOR, BIXOR, BILD, BIST
15
0
8
7
op
0
Operand:
Bit No.:
register indirect (@Rn)
immediate (#xx:3)
rn
0
0
0
0
0
0
0
IMM
op
15
0
8
7
op
Operand:
Bit No.:
absolute (@aa:8)
immediate (#xx:3)
abs
0
0
0
0
IMM
op
Figure 2.7 Bit Manipulation Instruction Codes (2)
Summary of Contents for F-ZTAT H8 Series
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Page 194: ...7 RAM Rev 3 00 Jul 19 2007 page 168 of 532 REJ09B0397 0300...
Page 234: ...8 I O Ports Rev 3 00 Jul 19 2007 page 208 of 532 REJ09B0397 0300...
Page 274: ...9 Timers Rev 3 00 Jul 19 2007 page 248 of 532 REJ09B0397 0300...
Page 352: ...12 A D Converter Rev 3 00 Jul 19 2007 page 326 of 532 REJ09B0397 0300...
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