9. Timers
Rev.3.00 Jul. 19, 2007 page 234 of 532
REJ09B0397-0300
Bit 6—Compare Match Flag H (CMFH):
Bit 6 is a status flag indicating a compare match
between TCFH and OCRFH. This flag is set by hardware and cleared by software. It cannot be set
by software.
Bit 6: CMFH
Description
0 Clearing
condition:
After reading CMFH = 1, cleared by writing 0 to CMFH
(initial value)
1 Setting
condition:
Set when the TCFH value matches OCRFH value
Bit 5—Timer Overflow Interrupt Enable H (OVIEH):
Bit 5 enables or disables TCFH
overflow interrupts.
Bit 5: OVIEH
Description
0
TCFH overflow interrupt disabled
(initial value)
1
TCFH overflow interrupt enabled
Bit 4—Counter Clear H (CCLRH):
In 16-bit mode, bit 4 selects whether or not TCF is cleared
when a compare match occurs between TCF and OCRF.
In 8-bit mode, bit 4 selects whether or not TCFH is cleared when a compare match occurs between
TCFH and OCRFH.
Bit 4: CCLRH
Description
0
16-bit mode: TCF clearing by compare match disabled
(initial value)
8-bit mode: TCFH clearing by compare match disabled
1
16-bit mode: TCF clearing by compare match enabled
8-bit mode: TCFH clearing by compare match enabled
Bit 3—Timer Overflow Flag L (OVFL):
Bit 3 is a status flag indicating TCFL overflow (H'FF
to H'00). This flag is set by hardware and cleared by software. It cannot be set by software.
Bit 3: OVFL
Description
0 Clearing
condition:
After reading OVFL = 1, cleared by writing 0 to OVFL
(initial value)
1 Setting
condition:
Set when the value of TCFL goes from H'FF to H'00
Summary of Contents for F-ZTAT H8 Series
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