10. Serial Communication Interface
Rev.3.00 Jul. 19, 2007 page 257 of 532
REJ09B0397-0300
to
φ
/2) selected in bits CKS2 to CKS0 is output continuously from pin SCK
1
. When an external
clock is used, pin SCK
1
is the clock input pin.
Data Transfer Format
Figure 10.2 shows the data transfer format. Data is sent and received starting from the least
significant bit, in LSB-first format. Transmit data is output from one falling edge of the serial
clock until the next falling edge. Receive data is latched at the rising edge of the serial clock.
SCK
SO /SI
1
1
1
Bit 0
Bit 1
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Figure 10.2 Transfer Format
Data Transfer Operations
Transmitting:
A transmit operation is carried out as follows.
•
Set bits SO1 and SCK1 in PMR3 TO 1 so that the respective pins function as SO
1
and SCK
1
. If
necessary, set bit POF1 in port mode register 2 (PMR2) for NMOS open drain output at pin
SO
1
.
•
Clear bit SNC1 in SCR1 to 0, and set bit SNC0 to 1 or 0, designating 8- or 16-bit synchronous
transfer mode. Select the serial clock in bits CKS3 to CKS0. Writing data to SCR1 initializes
the internal state of SCI1.
•
Write transmit data in SDRL and SDRU, as follows.
⎯
8-bit transfer mode: SDRL
⎯
16-bit transfer mode: Upper byte in SDRU, lower byte in SDRL
•
Set the SCSR1 start flag (STF) to 1. SCI1 starts operating and outputs transmit data at pin SO
1
.
•
After data transmission is complete, bit IRRS1 in interrupt request register 1 (IRR1) is set to 1.
When an internal clock is used, a serial clock is output from pin SCK
1
in synchronization with the
transmit data. After data transmission is complete, the serial clock is not output until the next time
the start flag is set to 1. During this time, pin SO
1
continues to output the value of the last bit
transmitted.
When an external clock is used, data is transmitted in synchronization with the serial clock input at
pin SCK
1
. After data transmission is complete, an overrun occurs if the serial clock continues to be
input; no data is transmitted and the SCSR1 overrun error flag (bit ORER) is set to 1.
While transmission is stopped, the output value of pin SO
1
can be changed by rewriting bit SOL in
SCSR1.
Summary of Contents for F-ZTAT H8 Series
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