13. Dot Matrix LCD Controller (H8/3857 Group)
Rev.3.00 Jul. 19, 2007 page 333 of 532
REJ09B0397-0300
13.2.3
Control Register 2 (LR1)
7
⎯
⎯
⎯
6
DISP
0
W
5
⎯
⎯
⎯
4
OPON
0
W
3
RMW
0
W
0
BLK
0
W
2
⎯
⎯
⎯
1
INC
0
W
Bit
Initial value
Read/Write
LR1 is an 8-bit write-only register that selects operation or halting of LCD display and the op-amp
circuits, performs read-modify-write mode setting, and selects the address to be incremented in the
display memory.
Upon reset, LR1 is initialized to H'00.
Bit 7—Reserved Bit:
Bit 7 is reserved; it should always be cleared to 0.
Bit 6—LCD Operation Setting (DISP):
Bit 6 selects operation or halting of the LCD display.
When the LSBY bit in LR0 is set to 1, DISP is cleared.
Bit 6: DISP
Description
0
LCD is turned off. All LCD outputs go to the V
SS
level
(initial value)
1
LCD is turned on
Bit 5—Reserved Bit:
Bit 5 is reserved; it should always be cleared to 0.
Bit 4—Op-Amp Circuit Operation Setting (OPON):
Bit 4 selects operation or halting of the op-
amp circuits. When the LCD drive power supply level is applied to V1OUT to V5OUT from an
external source, OPON must be cleared to 0.
When the LSBY bit in LR0 is set to 1, OPON is cleared.
Bit 4: OPON Description
0
Built-in op-amps are halted, and output becomes high-impedance. LCD drive
voltage can be input from external source
(initial value)
1
Built-in op-amps operate
Summary of Contents for F-ZTAT H8 Series
Page 6: ...Rev 3 00 Jul 19 2007 page iv of xxiv REJ09B0397 0300...
Page 194: ...7 RAM Rev 3 00 Jul 19 2007 page 168 of 532 REJ09B0397 0300...
Page 234: ...8 I O Ports Rev 3 00 Jul 19 2007 page 208 of 532 REJ09B0397 0300...
Page 274: ...9 Timers Rev 3 00 Jul 19 2007 page 248 of 532 REJ09B0397 0300...
Page 352: ...12 A D Converter Rev 3 00 Jul 19 2007 page 326 of 532 REJ09B0397 0300...
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