Appendix B Internal I/O Registers
Rev.3.00 Jul. 19, 2007 page 472 of 532
REJ09B0397-0300
MDCR—Mode control register
H'89
Flash memory
(On-chip flash memory version only)
7
⎯
0
⎯
6
⎯
0
⎯
5
⎯
0
⎯
4
⎯
0
⎯
3
⎯
0
⎯
0
TSDS1
⎯
*
R
2
⎯
0
⎯
1
TSDS2
⎯
*
R
Bit
Initial value
Read/Write
Note:
*
Determined by the TEST and TEST2 pins.
:
:
:
Test pin monitor bits
SYSCR3—System control register 3
H'8F
Flash memory
(On-chip flash memory version only)
7
⎯
0
⎯
6
⎯
0
⎯
5
⎯
0
⎯
4
⎯
0
⎯
3
FLSHE
0
R/W
0
⎯
0
⎯
2
⎯
0
⎯
1
⎯
0
⎯
0
1
Flash memory control registers are unselected
Flash memory control registers are selected
Flash memory control register enable
Bit
Initial value
Read/Write
:
:
:
Summary of Contents for F-ZTAT H8 Series
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