9. Timers
Rev.3.00 Jul. 19, 2007 page 211 of 532
REJ09B0397-0300
Block Diagram
Figure 9.1 shows a block diagram of timer A.
PSW
Inter
nal data b
us
PSS
TMOW
1/4
φ
φ
TMA
TCA
φ
/32
φ
/16
φ
/8
φ
/4
W
W
W
W
φ
/32
φ
/16
φ
/8
φ
/4
W
W
W
W
φ
/128
W
φ
/8192,
φ
/4096,
φ
/2048,
φ
/512,
φ
/256,
φ
/128,
φ
/32,
φ
/8
IRRTA
÷
8
÷
64
÷
128
÷
256
*
*
*
*
φ
/4
W
Legend:
TMA:
TCA:
IRRTA:
PSW:
PSS:
Note:
*
Can be selected only when the prescaler W output (
φ
W
/128) is used as the TCA input clock.
Timer mode register A
Timer counter A
Timer A overflow interrupt request flag
Prescaler W
Prescaler S
W
Figure 9.1 Block Diagram of Timer A
Pin Configuration
Table 9.2 shows the timer A pin configuration.
Table 9.2
Pin Configuration
Name Abbr.
I/O
Function
Clock output
TMOW
Output
Output of waveform generated by timer A output
circuit
Summary of Contents for F-ZTAT H8 Series
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Page 194: ...7 RAM Rev 3 00 Jul 19 2007 page 168 of 532 REJ09B0397 0300...
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