8. I/O Ports
Rev.3.00 Jul. 19, 2007 page 195 of 532
REJ09B0397-0300
Port Data Register 4 (PDR4)
Bit
7 6 5 4 3 2 1 0
⎯
⎯
⎯
⎯
P4
3
P4
2
P4
1
P4
0
Initial
value 1 1 1 1
Undefined
0 0 0
Read/Write
⎯
⎯
⎯
⎯
R
R/W
R/W
R/W
PDR4 is an 8-bit register that stores data for port 4 pins P4
2
to P4
0
. If port 4 is read while PCR4
bits are set to 1, the values stored in PDR4 are read, regardless of the actual pin states. If port 4 is
read while PCR4 bits are cleared to 0, the pin states are read.
The pin state is always read from bit 3 (P4
3
).
Upon reset, PDR4 is initialized to H'F8.
Port Control Register 4 (PCR4)
Bit
7 6 5 4 3 2 1 0
⎯
⎯
⎯
⎯
⎯
PCR4
2
PCR4
1
PCR4
0
Initial
value 1 1 1 1 1 0 0 0
Read/Write
⎯
⎯
⎯
⎯
⎯
W W W
PCR4 controls whether each of the port 4 pins P4
2
to P4
0
functions as an input pin or output pin.
Setting a PCR4 bit to 1 makes the corresponding pin an output pin, while clearing the bit to 0
makes the pin an input pin. The settings in PCR4 and in PDR4 are valid only when the
corresponding pin is designated in SCR3 as a general I/O pin.
Upon reset, PCR4 is initialized to H'F8.
PCR4 is a write-only register. All bits are read as 1.
Summary of Contents for F-ZTAT H8 Series
Page 6: ...Rev 3 00 Jul 19 2007 page iv of xxiv REJ09B0397 0300...
Page 194: ...7 RAM Rev 3 00 Jul 19 2007 page 168 of 532 REJ09B0397 0300...
Page 234: ...8 I O Ports Rev 3 00 Jul 19 2007 page 208 of 532 REJ09B0397 0300...
Page 274: ...9 Timers Rev 3 00 Jul 19 2007 page 248 of 532 REJ09B0397 0300...
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