
IDT Switch Core
PES32NT24xG2 User Manual
4 - 9
January 30, 2013
Notes
As another example, if the DMA engine located in function 2 of port 0 is active, the P24IC field of all
ports out of which a DMA may issue traffic must not be set to 0x0. This includes ports in the same logical
partition as the DMA, or ports in other partitions (i.e., when the DMA transmits packets across the NT bridge
or NT multicast).
Finally, note that the percentage of arbitration cycles allocated for route-to-self transfers (i.e., see
section Packet Routing Classes on page 4-5) may be controlled by modifying the appropriate field in the
VC0PARBCIx registers. For example, arbitration cycle allocation for route-to-self transfers in port 0 is
controlled via the Port 0 Initial Count (P0IC) field in this port’s VC0PARBCI[0] register. Similarly, arbitration
cycle allocation for route-to-self transfers in port 23 is controlled via the P23IC field in this port’s
VC0PARBCI[5] register.
By default, arbitration cycle allocation for route-to-self transfers is set to the maximum value to prevent
starvation of this type of transfer. It is recommended that the value not be modified, and it must never be set
to 0x0.
Cut-Through Routing
The PES32NT24xG2 utilizes a combined input and output buffered cut-through switching architecture to
forward PCI Express TLPs between switch ports. Cut-through means that while a TLP is being received on
an ingress link, it can be simultaneously routed across the switch and transferred on the egress link. The
entire TLP need not be received and buffered prior to starting the routing process (i.e., store-and-forward).
This reduces the latency experienced by packets as they are transferred across the switch.
Typically, cut-through occurs when a TLP is received on an ingress link whose bandwidth is greater than
or equal to the bandwidth of the egress link. For example, a TLP received on a x4 Gen 2 port and destined
to a x1 Gen 2 port is cut-through the switch. This rule ensures that the ingress link has enough bandwidth to
prevent ‘underflow’ of the egress link.
In addition to this, the PES32NT24xG2 does “adaptive cut-through”, meaning that packets are cut-
through even if the egress link bandwidth is greater than the ingress link bandwidth. In this case, the cut-
through transfer starts when the ingress port has received enough quantity of the packet such that the
packet can be sent to the egress link without underflowing this link.
The ingress and egress link bandwidth is determined by the negotiated speed and width of the links.
Table 4.5 shows the conditions under which cut-through and adaptive-cut-through occur. When the
conditions are met, cut-through is performed across the IFB, crossbar
1
, and EFB. Note that a packet under-
going a cut-through transfer across the switch core may be temporarily delayed by the presence of prior
packets in the IFB and/or EFB (i.e., head-of-line blocking). In this case, the packet starts cutting-through as
soon as it becomes unblocked.
When cut-through routing of a packet is not possible, the packet is fully buffered in the appropriate IFB
prior to being transferred to the EFB and towards the egress link (i.e., store-and-forward operation). Once
the packet is stored in the IFB, there is no necessity to fully store it in the EFB as it is transferred towards
the egress link (i.e., the packet can cut-through the EFB).
1.
During cut-through transfers, the crossbar maintains the connection between the appropriate IFB and EFB
through-out the duration of the transfer.
Summary of Contents for PCI Express 89HPES32NT24xG2
Page 20: ...IDT Table of Contents PES32NT24xG2 User Manual x January 30 2013 Notes...
Page 24: ...IDT List of Tables PES32NT24xG2 User Manual xiv January 30 2013 Notes...
Page 28: ...IDT List of Figures PES32NT24xG2 User Manual xviii January 30 2013 Notes...
Page 56: ...IDT PES32NT24xG2 Device Overview PES32NT24xG2 User Manual 1 20 January 30 2013 Notes...
Page 100: ...IDT Switch Core PES32NT24xG2 User Manual 4 22 January 30 2013 Notes...
Page 128: ...IDT Failover PES32NT24xG2 User Manual 6 4 January 30 2013 Notes...
Page 148: ...IDT Link Operation PES32NT24xG2 User Manual 7 20 January 30 2013 Notes...
Page 164: ...IDT SerDes PES32NT24xG2 User Manual 8 16 January 30 2013 Notes...
Page 170: ...IDT Power Management PES32NT24xG2 User Manual 9 6 January 30 2013 Notes...
Page 196: ...IDT Transparent Switch Operation PES32NT24xG2 User Manual 10 26 January 30 2013 Notes...
Page 244: ...IDT SMBus Interfaces PES32NT24xG2 User Manual 12 40 January 30 2013 Notes...
Page 247: ...IDT General Purpose I O PES32NT24xG2 User Manual 13 3 January 30 2013 Notes...
Page 248: ...IDT General Purpose I O PES32NT24xG2 User Manual 13 4 January 30 2013 Notes...
Page 330: ...IDT Switch Events PES32NT24xG2 User Manual 16 6 January 30 2013 Notes...
Page 342: ...IDT Multicast PES32NT24xG2 User Manual 17 12 January 30 2013 Notes...
Page 344: ...IDT Temperature Sensor PES32NT24xG2 User Manual 18 2 January 30 2013 Notes...
Page 384: ...IDT Register Organization PES32NT24xG2 User Manual 19 40 January 30 2013...
Page 492: ...IDT Proprietary Port Specific Registers PES32NT24xG2 User Manual 21 44 January 30 2013 Notes...
Page 588: ...IDT NT Endpoint Registers PES32NT24xG2 User Manual 22 96 January 30 2013 Notes...
Page 710: ...IDT JTAG Boundary Scan PES32NT24xG2 User Manual 25 12 January 30 2013 Notes...
Page 743: ...IDT Usage Models PES32NT24xG2 User Manual 26 33 January 30 2013 Notes...
Page 744: ...IDT Usage Models PES32NT24xG2 User Manual 26 34 January 30 2013 Notes...