IDT PCI Express 89HPES32NT24xG2, User Manual, Page: 234 / 744

IDT SMBus Interfaces
PES32NT24xG2 User Manual 12 - 30 January 30, 2013
Notes
SMBus Transactions
The slave SMBus interface responds to the following SMBus transactions initiated by a SMBus master.
See the SMBus Specification Version 2.0, August 3, 2000, SBS Implementers Forum for a detailed descrip-
tion of these transactions.
– Byte and Word Write/Read
– Block Write/Read
Initiation of any SMBus transaction other than those listed above to the slave SMBus interface produces
undefined results. Associated with each of the above transactions is a command code. The command code
format for operations supported by the slave SMBus interface is shown in Table 12.24.
Byte
Position
Field
Name
Description
0 CCODE Command Code. Slave Command Code field
1 BYTECNT Byte Count. The byte count field is only transmitted for block type
SMBus transactions. SMBus word and byte accesses do not contain
this field. The byte count field indicates the number of bytes following
the byte count field when performing a write or setting up for a read.
The byte count field is also used when returning data to indicate the
number of following bytes (including status).
In the device, the byte count field must not exceed 4 (i.e., one
DWord).
2 CMD Command. This field encodes fields related to the CSR register read
or write operation.
3 ADDRL Address Low. Lower 8-bits of the double-word system address1 of
register to access.
4 ADDRU Address Upper. Upper 8-bits of the double-word system address of
register to access.
5 DATALL Data Lower. Bits [7:0] of data doubleword.
6 DATALM Data Lower Middle. Bits [15:8] of data doubleword.
7 DATAUM Data Upper Middle. Bits [23:16] of data doubleword.
8 DATAUU Data Upper. Bits [31:24] of data doubleword.
Table 12.23 CSR Register Read or Write Operation Byte Sequence