
IDT Non-Transparent Switch Operation
PES32NT24xG2 User Manual
14 - 14
January 30, 2013
Notes
If the Completion Enable (CPEN) bit is cleared in the NTCTL register of the NT endpoint associated with
the translated TLP (i.e., in the destination partition), then the completion is silently dropped by the NT
endpoint that received the request (i.e., in the source partition). Note that this only applies to translated
completion TLPs and not to completion TLPs generated by the NT function itself (e.g., in response to a
configuration request).
Note that this bit must be set in the NT function of a source partition prior to sending non-posted
requests across the NTB, to allow the completions generated in the destination partition to be emit-
ted back into the source partition.
Also, note that a reset or hot reset of the NT function causes the CPEN bit to be cleared, in effect
preventing translated completions (which are possibly associated with requests received before the
reset or hot reset event) from being emitted by the NT function.
Refer to section Unexpected Completions on page 14-29 for further details on error conditions associ-
ated with completion ID translation.
Requester ID Capture Register
In order to program the NT Mapping Table, it is necessary that the requester IDs of agents in the PCI
Express hierarchy be known. In most systems, the assignment of requester IDs is done dynamically during
enumeration, and is therefore dependent on the organization of the PCI Express hierarchy.
To facilitate programming of the NT Mapping Table, the NT function in the PES32NT24xG2 contains a
proprietary register that may be used by a PCI Express agent to determine its requester ID in the PCI
Express hierarchy.
This register is the Requester ID Capture register (REQIDCAP), located in the configuration space of
the NT function. When an agent issues a configuration read request to the REQIDCAP register, a comple-
tion is generated. The completion’s data payload is 1 DW, with the upper 16 bits set to zero and the lower
16 bits reflecting the requester ID of the agent that issued the configuration read request. The same opera-
tion is supported when the REQIDCAP register is accessed via the NT BAR 0/1, when the BAR is mapped
to the NT configuration space. Writes to the REQIDCAP register are ignored.
TLP Attribute Processing
The NT function supports processing of the No Snoop attribute for request or completions TLPs that
cross the NTB. It also supports processing of the Address Type field for requests that cross the NTB. The
NT function does not support processing of the Relaxed Ordering attribute (i.e., this attribute is not modified
in TLPs that cross the NTB). Therefore, TLPs that cross the NTB and have the Relaxed Ordering attribute
set are understood to be relaxed ordered TLPs in both the source and destination partitions.
The Enable Relaxed Ordering (ERO) bit in the NT function’s PCI Express Device Control register
(PCIEDCTL) may be set or cleared by software, but it has no effect on the hardware. When this bit is
cleared by software, the user must ensure that no translated TLPs emitted by the NT function have the
Relaxed Ordering attribute set (i.e., TLPs received by an NT function in another partition and emitted by the
NT function whose ERO bit is cleared).
No Snoop Processing
The No Snoop attribute in the header of request TLPs indicates whether hardware enforced cache
coherence is expected. Some platforms lack the ability to control the no snoop attribute for generated
requests. Therefore, the PES32NT24xG2 provides the ability to modify the No Snoop attribute for TLPs
flowing through the NT interconnect.
When an NT table lookup is performed for request TLPs (described in section Request ID Translation on
page 14-11), the Request No Snoop Processing (RNS) field in the matching NT Mapping table entry is
examined. If the RNS bit is set, then the No Snoop attribute in the translated TLP is inverted. If the RNS bit
is cleared, then the No Snoop attribute in the translated TLP is equal to that of the received request TLP
(i.e., the No Snoop attribute is not modified).
Summary of Contents for PCI Express 89HPES32NT24xG2
Page 20: ...IDT Table of Contents PES32NT24xG2 User Manual x January 30 2013 Notes...
Page 24: ...IDT List of Tables PES32NT24xG2 User Manual xiv January 30 2013 Notes...
Page 28: ...IDT List of Figures PES32NT24xG2 User Manual xviii January 30 2013 Notes...
Page 56: ...IDT PES32NT24xG2 Device Overview PES32NT24xG2 User Manual 1 20 January 30 2013 Notes...
Page 100: ...IDT Switch Core PES32NT24xG2 User Manual 4 22 January 30 2013 Notes...
Page 128: ...IDT Failover PES32NT24xG2 User Manual 6 4 January 30 2013 Notes...
Page 148: ...IDT Link Operation PES32NT24xG2 User Manual 7 20 January 30 2013 Notes...
Page 164: ...IDT SerDes PES32NT24xG2 User Manual 8 16 January 30 2013 Notes...
Page 170: ...IDT Power Management PES32NT24xG2 User Manual 9 6 January 30 2013 Notes...
Page 196: ...IDT Transparent Switch Operation PES32NT24xG2 User Manual 10 26 January 30 2013 Notes...
Page 244: ...IDT SMBus Interfaces PES32NT24xG2 User Manual 12 40 January 30 2013 Notes...
Page 247: ...IDT General Purpose I O PES32NT24xG2 User Manual 13 3 January 30 2013 Notes...
Page 248: ...IDT General Purpose I O PES32NT24xG2 User Manual 13 4 January 30 2013 Notes...
Page 330: ...IDT Switch Events PES32NT24xG2 User Manual 16 6 January 30 2013 Notes...
Page 342: ...IDT Multicast PES32NT24xG2 User Manual 17 12 January 30 2013 Notes...
Page 344: ...IDT Temperature Sensor PES32NT24xG2 User Manual 18 2 January 30 2013 Notes...
Page 384: ...IDT Register Organization PES32NT24xG2 User Manual 19 40 January 30 2013...
Page 492: ...IDT Proprietary Port Specific Registers PES32NT24xG2 User Manual 21 44 January 30 2013 Notes...
Page 588: ...IDT NT Endpoint Registers PES32NT24xG2 User Manual 22 96 January 30 2013 Notes...
Page 710: ...IDT JTAG Boundary Scan PES32NT24xG2 User Manual 25 12 January 30 2013 Notes...
Page 743: ...IDT Usage Models PES32NT24xG2 User Manual 26 33 January 30 2013 Notes...
Page 744: ...IDT Usage Models PES32NT24xG2 User Manual 26 34 January 30 2013 Notes...