
IDT SMBus Interfaces
PES32NT24xG2 User Manual
12 - 32
January 30, 2013
Notes
Examples of Setting Up the I2C CSR Byte Sequence for a CSR Register
Read
The pseudo examples below demonstrate the block transaction settings for a CSR register read. As an
example, in many of the IDT utilities the CSR byte sequence array is passed to a TotalPhase Aardvark I2C
control function.
Table 12.26 lists the constant variables used in this example of setting up the command byte array.
Step 1. Initialize a CSR register offset variable and a command code init variable
CSR_Offset
=
address shifted by 2 bits to the right
CCode_i =
CCode_Init
5
0
0
Reserved. Must be zero
6
RERR
Read-Only
and Clear
Read Error. This bit is set if the last CSR read SMBus transaction
was not claimed by a device. Success indicates that the transaction
was claimed and not that the operation completed without error.
7
WERR
Read-Only
and Clear
Write Error. This bit is set if the last CSR write SMBus transaction
was not claimed by a device. Success indicates that the transaction
was claimed and not that the operation completed without error.
Constant Name
Value
Description
CCode_Block
0x40
[6:5] = 2 - Block option
CCode_Init
0x03
[0:0] = 1 - Current transaction is the last read or write sequence
[1:1] = 1 - Current transaction is the first of a read or write
sequence.
TranSize_BkWtHeader
3
Transaction block write header of size 3
TranSize_BkRdHeader
4
Transaction block read header of size 4
TranSize_Block
5
Transaction block size of 5
CMD_Init
0x00
[7:0] Initial CMD byte as zero
CMD_BELL
0x01
[0:0] Byte Enable Lower.
CMD_BELM
0x02
[1:1] Byte Enable Lower Middle.
CMD_BEUM
0x04
[2:2] Byte Enable Upper Middle.
CMD_BEUU
0x08
[3:3] Byte Enable Upper.
CMD_DWORD
0x0F
[3:0] Enable BELL, BELM, BEUM, BEUU
CMD_OPRD
0x10
[4:4] Enable CSR Operation default as CSR Read
Len_Byte
1
Length of 1 (1 byte)
Len_Word
2
Length of 2 (2 bytes)
Len_Dword
4
Length of 4 (4 bytes)
Table 12.26 Constants Used in Examples
Bit
Field
Field
Name
Type
Description
Table 12.25 CSR Register Read or Write CMD Field Description (Part 2 of 2)
Summary of Contents for PCI Express 89HPES32NT24xG2
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