
IDT Usage Models
PES32NT24xG2 User Manual
26 - 14
January 30, 2013
Notes
Each root-complex configures the NT lookup table in their corresponding NT function appropriately. For
example, assume RC0 had received messages from RC1 indicating that it is allowed to transfer TLPs to a
256 KB window in RC1’s memory address range starting at address 0x4000_0000 (1 GB).
Since BAR 2 is configured with a lookup table of 16 entries and a range of 1 MB, each table entry covers
a range of 64 KB (see Table 14.2). Therefore, in order to cover a destination range of 256 KB, four entries in
the NT lookup table are programmed for translation into partition 1, as follows:
The root-complex in each partition proceeds to configure the NT Mapping table using PCI Express
device IDs assigned during enumeration. The NT Mapping table is configured using the mechanism in
section NT Mapping Table on page 14-9. For each device in the partition that is allowed to communicate
across the NTB, an entry in the NT Mapping table is written. For example, assume RC0 wishes to allow the
following PCI Express functions in RC0’s domain to access the NT function:
–
Bus = 0, Device = 0, Function = 0 (e.g., root-port)
–
Bus = 3, Device = 0, Function = 0 (e.g., intelligent endpoint device)
RC0 programs the NT Mapping table as follows.
Note: The table entries programmed in the NT Mapping table need not be contiguous.
This completes the programming of the NT translation mechanism. Other bits in the NT function need to
be configured prior to starting traffic across the NTB (e.g., Bus Master Enable bit in the PCICMD register,
Completion Enable bit in the NTCTL register). At this point, the multi-processor system is ready to use
switch’s NTB capabilities for inter-domain communication.
For example, in partition 0, the root-port with PCI Express ID = 0/0/0 can communicate with partition 1
by issuing memory read/write TLPs that fall within the first 256 KB of the BAR 2 address window. If the
address falls within the first 64 KB of this range, the translated TLP’s address will map to address
(0x400 address[15:0]) and emerge out of the NT function in partition 1. If the address falls within
the next 64 KB of BAR 2, the translated TLP’s address will map to address (0x400 address[15:0]),
and so on.
Table
Entry # Valid
Partition
Translated Base
Address
1
1.
DWord aligned value of the translated base address field in the NT lookup table.
0
1
1
0x4000_0000
1
1
1
0x4001_0000
2
1
1
0x4002_0000
3
1
1
0x4003_0000
Table 26.1 Example NT Lookup Table Programming
Table
Entry # RNS CNS ATP PARTITION
BUS
DEV
FUNC VALID
0
0
0
0
0
0
0
0
1
1
0
0
0
0
3
0
0
1
Table 26.2 Example NT Mapping Table Programming
Summary of Contents for PCI Express 89HPES32NT24xG2
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