
IDT Multicast
PES32NT24xG2 User Manual
17 - 5
January 30, 2013
Notes
Multicast TLP Routing
A multicast TLP received without error by a function is forwarded as described in this section. Traditional
unicast routing rules do not apply to multicast TLPs. Unlike unicast routing rules that depend on whether the
TLP was received on the primary or secondary side of a PCI-to-PCI bridge and are thus different for
upstream and downstream switch ports, multicast TLP routing is symmetric. The same multicast routing
rules apply to all functions.
A multicast TLP received by a function is forwarded to the virtual PCI bus of the associated switch parti-
tion. All functions connected to the virtual PCI bus examine the multicast group ID associated with the multi-
cast TLP and perform the following actions.
–
The function on which the multicast TLP was received ignores the multicast TLP.
–
If the multicast enable (MCEN) bit is cleared, then the function ignores the multicast TLP.
–
Associated each function is a multicast receive vector that contains a bit corresponding to each
multicast group. If the MCEN bit is set and the bit corresponding to the multicast group ID associ-
ated with the multicast TLP is set in the multicast receive vector, then the multicast TLP is
accepted by the function. The multicast receive vector is contained in the Multicast Receive
(MCRCV) fields of the Multicast Receive Low (MCRCVL) and Multicast Receive High (MCRCVH)
registers.
–
A function that accepts a multicast TLP forwards the TLP after multicast egress processing is
performed. For a PCI-to-PCI bridge, forwarding a TLP means transmitting the TLP on the link
associated with the switch port corresponding to the PCI-to-PCI bridge.
–
If no function accepts a multicast TLP, then the TLP is silently discarded. This is not an error.
Note: This section described multicast TLP routing from a functional perspective to aid in under-
standing. This functional definition does not represent the actual multicast routing implementation in
the switch.
Multicast Egress Processing
Each PES32NT24xG2 PCI-to-PCI bridge function implements multicast overlay processing. When the
Overlay Size (OVRSIZE) field in the Multicast Overlay Base Address Low (MCOVRBARL) register is set to
less than six, multicast overlay processing is disabled and multicast TLPs are forwarded without modifica-
tion. When the OVRSIZE field value is six or greater, multicast overlay processing is performed on all multi-
cast TLPs accepted by the function as described below.
–
Address bits in the accepted multicast TLP with bit positions greater than or equal to OVRSIZE
are replaced by the corresponding address bits in the multicast overlay base address.
• The multicast overlay base address is contained in the Multicast Overlay BAR Low (MCBARL)
field in the Multicast Overlay Base Address Low (MCOVRBARL) register and the Multicast
Overlay BAR High (MCBARH) field in the Multicast Overlay Base Address High (MCOVRBARH)
register.
–
Address bits less than OVRSIZE are not modified.
–
As a result of multicast overlay processing, a multicast TLP with an original address above 4 GB
may be translated into a multicast TLP with address below 4 GB, and vice-versa. Thus, address
translation may change the size of a multicast TLP header (e.g., from 4 DWords to 3 DWords).
–
Multicast overlay processing is performed independently on all functions. Therefore, it is possible
to enable this capability in some functions and not others. The overlay base address associated
with different functions will likely have different values. This capability is available on both
upstream and downstream switch ports and operates in the same manner regardless of port type.
Summary of Contents for PCI Express 89HPES32NT24xG2
Page 20: ...IDT Table of Contents PES32NT24xG2 User Manual x January 30 2013 Notes...
Page 24: ...IDT List of Tables PES32NT24xG2 User Manual xiv January 30 2013 Notes...
Page 28: ...IDT List of Figures PES32NT24xG2 User Manual xviii January 30 2013 Notes...
Page 56: ...IDT PES32NT24xG2 Device Overview PES32NT24xG2 User Manual 1 20 January 30 2013 Notes...
Page 100: ...IDT Switch Core PES32NT24xG2 User Manual 4 22 January 30 2013 Notes...
Page 128: ...IDT Failover PES32NT24xG2 User Manual 6 4 January 30 2013 Notes...
Page 148: ...IDT Link Operation PES32NT24xG2 User Manual 7 20 January 30 2013 Notes...
Page 164: ...IDT SerDes PES32NT24xG2 User Manual 8 16 January 30 2013 Notes...
Page 170: ...IDT Power Management PES32NT24xG2 User Manual 9 6 January 30 2013 Notes...
Page 196: ...IDT Transparent Switch Operation PES32NT24xG2 User Manual 10 26 January 30 2013 Notes...
Page 244: ...IDT SMBus Interfaces PES32NT24xG2 User Manual 12 40 January 30 2013 Notes...
Page 247: ...IDT General Purpose I O PES32NT24xG2 User Manual 13 3 January 30 2013 Notes...
Page 248: ...IDT General Purpose I O PES32NT24xG2 User Manual 13 4 January 30 2013 Notes...
Page 330: ...IDT Switch Events PES32NT24xG2 User Manual 16 6 January 30 2013 Notes...
Page 342: ...IDT Multicast PES32NT24xG2 User Manual 17 12 January 30 2013 Notes...
Page 344: ...IDT Temperature Sensor PES32NT24xG2 User Manual 18 2 January 30 2013 Notes...
Page 384: ...IDT Register Organization PES32NT24xG2 User Manual 19 40 January 30 2013...
Page 492: ...IDT Proprietary Port Specific Registers PES32NT24xG2 User Manual 21 44 January 30 2013 Notes...
Page 588: ...IDT NT Endpoint Registers PES32NT24xG2 User Manual 22 96 January 30 2013 Notes...
Page 710: ...IDT JTAG Boundary Scan PES32NT24xG2 User Manual 25 12 January 30 2013 Notes...
Page 743: ...IDT Usage Models PES32NT24xG2 User Manual 26 33 January 30 2013 Notes...
Page 744: ...IDT Usage Models PES32NT24xG2 User Manual 26 34 January 30 2013 Notes...