IDT PCI Express 89HPES32NT24xG2, User Manual, Page: 58 / 744

IDT Clocking
PES32NT24xG2 User Manual 2 - 2 January 30, 2013
Figure 2.1 Logical Representation of PES32NT24AG2 Clocking Architecture
Figure 2.2 Logical Representation of PES32NT24BG2 Clocking Architecture
Port Clocking Modes
Port clocking refers to the clock that a port uses to receive and transmit serial data. The PES32NT24xG2 ports support two port clocking modes:
Global Clocked and Local Port Clocked. These modes are described in section Global Clocked Mode on page 2-3 and section Local Port Clocked
Mode on page 2-4.
Ports are not required to all operate in the same port clocking mode, but some restrictions do apply. Specifically, ports that share a SerDes quad
(as shown in Figure 2.1 above) must operate in the same clocking mode. Ports that do not share a SerDes quad may operate in different clocking
modes. Each row in Table 2.1 lists the ports that must operate in the same port clocking mode (i.e., Global Clocked or Local Port Clocked).
GCLK
Switch Core
PLL
SerDes
Quad
Ports
0 & 1
SerDes
Quad
P
02CLK
P
00CLK
Ports
2 & 3
SerDes
Quad
Ports
4 & 5
SerDes
Quad
P
06CLK
P
04CLK
Ports
6 & 7
SerDes
Quad
Ports
16 to 19
SerDes
Quad
Ports
20 to 23
P
16CLK
P
20CLK
SerDes
Quad
Ports
8 to 11
SerDes
Quad
Ports
12 to 15
P
08CLK
P
12CLK
GCLK
Switch Core
PLL
SerDes
Quad
Ports
0 & 1
SerDes
Quad
P0
2
C
L
K
P0
0
C
L
K
Ports
2 & 3
SerDes
Quad
Ports
4 & 5
SerDes
Quad
P0
4
C
L
K
Ports
6 & 7
SerDes
Quad
Ports
16 to 19
SerDes
Quad
Ports
20 to 23
SerDes
Quad
Ports
8 to 11
SerDes
Quad
Ports
12 to 15