IDT PCI Express 89HPES32NT24xG2, User Manual, Page: 707 / 744

IDT JTAG Boundary Scan
PES32NT24xG2 User Manual 25 - 9 January 30, 2013
Notes
EXTEST
The external test (EXTEST) instruction is used to control the boundary scan register, once it has been
initialized using the SAMPLE/PRELOAD instruction. Using EXTEST, the user can then sample inputs from
or load values onto the external pins of the device. Once this instruction is selected, the user then uses the
SHIFT-DR TAP controller state to shift values into the boundary scan chain. When the TAP controller
passes through the UPDATE-DR state, these values will be latched onto the output pins or into the output
enables.
SAMPLE/PRELOAD
The sample/preload instruction has a dual use. The primary use of this instruction is for preloading the
boundary scan register prior to enabling the EXTEST instruction. Failure to preload will result in unknown
random data being driven onto the output pins when EXTEST is selected. The secondary function of
SAMPLE/PRELOAD is for sampling the system state at a particular moment. Using the SAMPLE function,
the user can halt the device at a certain state and shift out the status of all of the pins and output enables at
that time.
BYPASS
The BYPASS instruction is used to truncate the boundary scan register to a single bit in length. During
system level use of the JTAG, the boundary scan chains of all the devices on the board are connected in
series. In order to facilitate rapid testing of a given device, all other devices are put into BYPASS mode.
Instruction Definition Opcode
EXTEST Mandatory instruction allowing the testing of board level interconnec-
tions. Data is typically loaded onto the latched parallel outputs of the
boundary scan shift register using the SAMPLE/PRELOAD instruction
prior to use of the EXTEST instruction. EXTEST will then hold these
values on the outputs while being executed. Also see the CLAMP
instruction for similar capability. 000000
SAMPLE/
PRELOAD
Mandatory instruction that allows data values to be loaded onto the
latched parallel output of the boundary scan shift register prior to
selection of the other boundary scan test instruction. The Sample
instruction allows a snapshot of data flowing from the system pins to
the on-chip logic or vice versa. 000001
IDCODE Provided to select Device Identification to read out manufacturer’s
identity, part, and version number. 000010
HIGHZ Tri-states all output and bidirectional boundary scan cells. 000011
VALIDATE Automatically loaded into the instruction register whenever the TAP
controller passes through the CAPTURE-IR state. The lower two bits
‘01’ are mandated by the IEEE Std. 1149.1 specification. 101101
EXTEST_TRAIN Used for AC pin test (IEEE 1149.6 specification) 111100
EXTEST_PULSE Used for AC pin test (IEEE 1149.6 specification) 111101
CLAMP Provides JTAG users with the option to bypass the part’s JTAG con-
troller while keeping the part outputs controlled similar to EXTEST. 111110
BYPASS The BYPASS instruction is used to truncate the boundary scan regis-
ter as a single bit in length. 111111
All other Opcodes are RESERVED
Table 25.3 Instructions Supported by the JTAG Boundary Scan