IDT PCI Express 89HPES32NT24xG2, User Manual, Page: 345 / 744

Notes
PES32NT24xG2 User Manual 19 - 1 January 30, 2013
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Chapter 19
Register Organization
Overview
All software visible registers in the switch are contained in a 512 KB global address space. The address
of a register in this address range is referred to as the system address of the register.
– The system address is 19-bits in size.
– Currently, the lower 256 KB of the global address space are used for port and switch registers.
The upper 256 KB are not used and reserved.
System addresses are used for serial EEPROM initialization and slave SMBus register access. The
global address range is divided into regions as shown in Table 19.1.
– There is a 4 KB region for the configuration registers of each PCI-to-PCI bridge function in the
switch.
– There is a 4 KB region for the configuration registers of each NT function in the switch.
– There is a 4 KB region for the configuration registers of each DMA function in the switch.
– In addition, there is one 8 KB region for switch configuration and status registers.
Base Address Address Range
0x00000 Port 0 PCI-to-PCI Bridge Registers
0x01000 Port 0 NT Endpoint Registers
0x02000 Port 1 PCI-to-PCI Bridge Registers
0x03000 Reserved
0x04000 Port 2 PCI-to-PCI Bridge Registers
0x05000 Port 2 NT Endpoint Registers
0x06000 Port 3 PCI-to-PCI Bridge Registers
0x07000 Reserved
0x08000 Port 4 PCI-to-PCI Bridge Registers
0x09000 Port 4 NT Endpoint Registers
0x0A000 Port 5 PCI-to-PCI Bridge Registers
0x0B000 Reserved
0x0C000 Port 6 PCI-to-PCI Bridge Registers
0x0D000 Port 6 NT Endpoint Registers
0x0E000 Port 7 PCI-to-PCI Bridge Registers
0x0F000 Reserved
0x10000 Port 8 PCI-to-PCI Bridge Registers
0x11000 Port 8 NT Endpoint Registers
0x12000 Port 9 PCI-to-PCI Bridge Registers
0x13000 Reserved
0x14000 Port 10 PCI-to-PCI Bridge Registers
Table 19.1 Global Address Space Layout (Part 1 of 2)