IDT PCI Express 89HPES32NT24xG2, User Manual, Page: 294 / 744

IDT DMA Controller
PES32NT24xG2 User Manual 15 - 6 January 30, 2013
Notes
Figure 15.5 Constant Addressing Example
Note that the Source Stride Size (SSSIZE) determines the size of the region from which data is read. In
the example above, SSSIZE is set to 4 and SSCOUNT is set to 256 to perform 256 read operations from
the same DWord, for a total of 1024 bytes transferred (i.e., BCOUNT is set to 1024). Similarly, the Destina-
tion Stride Size (DSSIZE) controls the size of the region to which data is written. In the example above,
DSSIZE is set to 0 to indicate an infinite destination stride and DSCOUNT is set to 1 as the destination
addressing is linear.
Finally, note the Maximum Read Request Size (MRRS) field in the Data Transfer DMA Descriptor may
cause the DMA to issue a single or multiple read operations to transfer the desired data. For the example
above, if MRRS is set to 1 byte, then the DMA would issue four requests for each DWord of data trans-
ferred.
DMA Descriptors
A DMA channel operates by reading descriptors from memory and performing the specified processing.
Complex data movement operations, such as scatter gather, may be implemented by linking multiple
descriptors together into a descriptor list. Figure 15.6 illustrates a descriptor list.
Figure 15.6 DMA Descriptor List
BCOUNT 1024
SADDR 0x0100_0000 DADDR 0x0200_0001
SSSIZE 4 DSSIZE 0
SSCOUNT 256 DSCOUNT 1
SSDIST -4 DSDIST 0
Table 15.3 Constant Addressing DMA Example
PCI Express
Memory Address
Space
BCOUNT
PCI Express
Memory Address
Space
DADDR
SADDR
DMAxDPTRH / DMAxDPTRL
Descriptor
A
Descriptor
B
Descriptor
C
Descriptor
D