IDT PCI Express 89HPES32NT24xG2, User Manual, Page: 323 / 744

IDT DMA Controller
PES32NT24xG2 User Manual 15 - 35 January 30, 2013
Notes
Table 15.13 shows the prioritization of transaction layer errors used by the DMA function. All the errors
listed in the table are associated with the reception of a TLP. Errors not detected on the reception of a TLP
(e.g., completion timeout) or errors that are not applicable to the DMA function (e.g., completer abort issued
in response to a received request) are not shown. Higher priority errors have precedence over lower priority
errors. Errors with the same priority are mutually exclusive (the errors can’t occur simultaneously).
The prioritization of errors shown in Table 15.13 determines the error that is logged and reported when
multiple errors are detected simultaneously for the received TLP. Higher priority errors inhibit the logging
and reporting of lower priority errors in AER.
Figure 15.15 shows the decision diagram for the DMA function’s error checking and logging on a
received TLP taking into account the error pollution rules and priorities.
Error
Associated
with
Packet
Reception
Priority
Internal Error Depends on
error.
6 (highest)
Receiver Overflow Yes 5
ECRC Check failure Yes 4
Malformed TLP received Yes 3
Unsupported Request Yes 2
Unexpected Completion received Yes
Poisoned TLP received Yes 1 (Lowest)
Table 15.13 Prioritization of Transaction Layer Errors