IDT PCI Express 89HPES32NT24xG2, User Manual, Page: 601 / 744

IDT DMA Function Registers
PES32NT24xG2 User Manual 23 - 13 January 30, 2013
Notes
PCIEDSTS - PCI Express Device Status (0x04A)
11 ENS RW 0x1 Enable No Snoop.
When this bit is set, the DMA function is permitted to set the
No Snoop bit in the attributes field of the transactions it initi-
ates (refer to section TLP Attribute and Traffic Class Control
on page 15-20).
When this bit is cleared, the DMA function does not set the
No Snoop bit for the transactions it initiates. This bit over-
rides the No Snoop controls described in section TLP Attri-
bute and Traffic Class Control on page 15-20.
14:12 MRRS RW 0x2 Maximum Read Request Size.
This field sets the maximum read request size for the DMA
function as a requester.
0x0 - (s128) 128 bytes max read request size
0x1 - (s256) 256 bytes max read request size
0x2 - (s512) 512 bytes max read request size
0x3 - (s1024) 1024 bytes max read request size
0x4 - (s2048) 2048 bytes max read request size
0x5 - (s4096) 4096 bytes max read request size
0x6 - reserved (treated as 128 bytes)
0x7 - reserved (treated as 128 bytes)
15 IFLR RO 0x0 Initiate Function Level Reset.
This function does not support function-level-reset. There-
fore this field is hardwired to 0x0.
Bit
Field
Field
Name
Type Default
Value
Description
0 CED RW1C 0x0 Correctable Error Detected.
This bit indicates the status of correctable errors detected
by this function. Errors are logged in this register regardless
of whether error reporting is enabled or not.
1 NFED RW1C 0x0 Non-Fatal Error Detected.
This bit indicates the status of correctable errors detected
by this function. Errors are logged in this register regardless
of whether error reporting is enabled or not.
2 FED RW1C 0x0 Fatal Error Detected.
This bit indicates the status of Fatal errors detected by this
function. Errors are logged in this registers regardless of
whether error reporting is enabled or not.
3 URD RW1C 0x0 Unsupported Request Detected.
This bit indicates that the function received an Unsupported
Request. Errors are logged in this register regardless of
whether error reporting is enabled or not.
4 AUXPD RO 0x0 Aux Power Detected.
Devices that require AUX power, set this bit when AUX
power is detected.This device does not require AUX power,
hence the value is hardwired to zero.
Bit
Field
Field
Name
Type Default
Value
Description