Xilinx Virtex-II Pro PPC405, Руководство пользователя

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March 2002 Release www.xilinx.com 407
Virtex-II Pro™ Platform FPGA Documentation 1-800-255-7778
Multiply-Accumulate Instruction-Set Extensions
R
Figure 3-28 shows the operation of the integer multiply-accumulate cross-halfword to
word instructions.
Multiply-Accumulate Cross-Halfword to Word
Saturate Signed Instructions
r D is added to the signed product ( r A[16:31])
×
( r B[0:15]),
producing a 33-bit result. If the result does not overflow, the low-32
bits of this result are stored in
r D. Otherwise, the nearest-
representable value is stored in r D.
macchws Multiply Accumulate Cross Halfword
to Word Saturate Signed
XER and CR0 are
not
updated.
r D, r A, r B
macchws. Multiply Accumulate Cross Halfword
to Word Saturate Signed and Record
CR0 is updated to reflect the result.
macchwso Multiply Accumulate Cross Halfword
to Word Saturate Signed with
Overflow Enabled
XER[OV,SO] are updated to reflect the result.
macchwso. Multiply Accumulate Cross Halfword
to Word Saturate Signed with
Overflow Enabled and Record
XER[OV,SO] and CR0 are updated to reflect the
result.
Multiply-Accumulate Cross-Halfword to Word
Saturate Unsigned Instructions
r D is added to the unsigned product ( r A[16:31])
×
( r B[0:15]),
producing a 33-bit result. If the result does not overflow, the low-32
bits of this result are stored in
r D. Otherwise, the nearest-
representable value is stored in r D.
macchwsu Multiply Accumulate Cross Halfword
to Word Saturate Unsigned
XER and CR0 are
not
updated.
r D, r A, r B
macchwsu. Multiply Accumulate Cross Halfword
to Word Saturate Unsigned and
Record
CR0 is updated to reflect the result.
macchwsuo Multiply Accumulate Cross Halfword
to Word Saturate Unsigned with
Overflow Enabled
XER[OV,SO] are updated to reflect the result.
macchwsuo. Multiply Accumulate Cross Halfword
to Word Saturate Unsigned with
Overflow Enabled and Record
XER[OV,SO] and CR0 are updated to reflect the
result.
Multiply-Accumulate Cross-Halfword to Word
Modulo Unsigned Instructions
r D is added to the unsigned product ( r A[16:31])
×
( r B[0:15]),
producing a 33-bit result. The low-32 bits of this result are stored in
r D.
macchwu Multiply Accumulate Cross Halfword
to Word Modulo Unsigned
XER and CR0 are
not
updated.
r D, r A, r B
macchwu. Multiply Accumulate Cross Halfword
to Word Modulo Unsigned and
Record
CR0 is updated to reflect the result.
macchwuo Multiply Accumulate Cross Halfword
to Word Modulo Unsigned with
Overflow Enabled
XER[OV,SO] are updated to reflect the result.
macchwuo. Multiply Accumulate Cross Halfword
to Word Modulo Unsigned with
Overflow Enabled and Record
XER[OV,SO] and CR0 are updated to reflect the
result.
Table 3-40: Multiply-Accumulate Cross-Halfword to Word Instructions (Continued)
Mnemonic Name Operation
Operand
Syntax