Xilinx Virtex-II Pro PPC405, Руководство пользователя

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March 2002 Release www.xilinx.com 327
Virtex-II Pro™ Platform FPGA Documentation 1-800-255-7778
PowerPC Architecture Overview
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• Special-purpose registers for controlling the use of debug resources, timer resources,
interrupts, real-mode storage attributes, memory-management facilities, and other
architected processor resources.
• A device-control-register address space for managing on-chip peripherals such as
memory controllers.
• A dual-level interrupt structure and interrupt-control instructions.
• Multiple timer resources.
• Debug resources that enable hardware-debug and software-debug functions such as
instruction breakpoints, data breakpoints, and program single-stepping.
Virtual Environment
The virtual environment defines architectural features that enable application programs to
create or modify code, to manage storage coherency, and to optimize memory-access
performance. It defines the cache and memory models, the timekeeping resources from a
user perspective, and resources that are accessible in user mode but are primarily used by
system-library routines. The following summarizes the virtual-environment features of the
PowerPC embedded-environment architecture:
• Storage model:
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Storage-control instructions as defined in the PowerPC virtual-environment
architecture. These instructions are used to manage instruction caches and data
caches, and for synchronizing and ordering instruction execution.
- Storage attributes for controlling memory-system behavior. These are: write-
through, cacheability, memory coherence (optional), guarded, and endian.
- Operand-placement requirements and their effect on performance.
• The time-base function as defined by the PowerPC virtual-environment architecture,
for user-mode read access to the 64-bit time base.