March 2002 Release
355
Virtex-II Pro™ Platform FPGA Documentation
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Instruction Conventions
R
Instruction Classes
PowerPC instructions belong to one of the following three classes:
•
Defined
•
Illegal
•
Reserved
An instruction class is determined by examining the primary opcode, and the extended
opcode if one exists. If the opcode and extended opcode combination does not specify a
defined instruction or reserved instruction, the instruction is illegal. Although the
definitions of these terms are consistent among PowerPC processor implementations, the
assignment of these classifications is not. For example, an instruction specific to 64-bit
implementations is considered defined for 64-bit implementations but illegal for 32-bit
implementations.
In future versions of the PowerPC architecture, instruction encodings that are now illegal
or reserved can become defined (by being added to the architecture) or reserved (by being
assigned a special purpose in an implementation).
Boundedly Undefined
The results of executing an instruction are said to be
boundedly undefined
if those results
could be achieved by executing an arbitrary sequence of instructions, starting in the
machine state prior to executing the given instruction. Boundedly-undefined results for an
instruction can vary between implementations and between different executions on the
same implementation.
Defined Instruction Class
Defined instructions contain all the instructions defined by the PowerPC architecture.
Defined instructions are guaranteed to be supported by all implementations of the
PowerPC architecture. The only exceptions are the instructions defined only for 64-bit
implementations, instructions defined only for 32-bit implementations, and instructions
defined only for embedded implementations. A PowerPC processor can invoke the illegal-
instruction error handler (through the program-interrupt handler) when an
unimplemented instruction is encountered, allowing emulation of the instruction in
software.
A defined instruction can have preferred forms and invalid forms as described in the
following sections.
Preferred Instruction Forms
A
preferred form
of a defined instruction is one in which the instruction executes in an
efficient manner. Any form other than the preferred form can take significantly longer to
execute. The following instructions have preferred forms:
•
Load-multiple and store-multiple instructions
•
Load-string and store-string instructions
•
OR-immediate instruction (preferred form of no-operation)
Invalid Instruction Forms
An
invalid form
of a defined instruction is one in which one or more operands are coded
incorrectly and in a manner that can be deduced only by examining the instruction
encoding (primary and extended opcodes). For example, coding a value of 1 in a reserved
bit (normally cleared to 0) produces an invalid instruction form.
The following instructions have invalid forms:
•
Branch-conditional instructions
•
Load with update and store with update instructions
•
Load multiple instructions
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