Xilinx Virtex-II Pro PPC405, Руководство пользователя

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March 2002 Release www.xilinx.com 401
Virtex-II Pro™ Platform FPGA Documentation 1-800-255-7778
Integer Instructions
R
These instructions left rotate GPR contents and logically AND the result with the mask
prior to writing it into the destination GPR. The destination register contains the rotated
result in the unmasked bit positions (mask bits with 1’s), and 0’s in the masked bit
positions (mask bits with 0’s). Rotation amounts are specified using an immediate field in
the instruction (the SH opcode field) or using a value in a register.
Figure 3-24 shows an example of a rotate left then AND-with-mask immediate instruction.
In this example, the rotation amount is 16 bits as specified by the SH field in the instruction.
The mask specifies an unmasked byte in bit positions 16:23 (MB=16, ME=23) and masks all
other bit positions. The example shows the original contents of the destination register,
r A,
and the source register, r S. r S is left-rotated 16 bits and the result is written to r A after
ANDing with the mask. This has the effect of extracting byte 0 from r S ( r S[0:7]) and placing
it in byte 2 of r A ( r A[16:23]).
Rotate Left then Mask-Insert Instructions
Table 3-36 shows the PowerPC rotate left then mask-insert instructions. For each type of
instruction shown, the “Operation” column indicates the rotate operation performed. The
Rotate Left then AND-with-Mask Instructions r A is loaded with the masked result of left-rotating ( r S) the number of
bits specified by ( r B). The mask is specified by operands MB and ME.
rlwnm Rotate Left Word then AND with
Mask
CR0 is
not
updated.
r A, r S, r B,MB,ME
rlwnm. Rotate Left Word then AND with
Mask and Record
CR0 is updated to reflect the result.
Table 3-36: Rotate Left then AND-with-Mask Instructions (Continued)
Mnemonic Name Operation
Operand
Syntax
Figure 3-24: Rotate Left then AND-with-Mask Immediate Example
UG011_16_033101
r S
0 31
0x88 0x77 0x66 0x55
Rotate
r S
Rotate by SH=16 bits
0 31
0x66 0x55 0x88 0x77
r A
0 31
0xFF 0xEE 0xDD 0xCC
r A
0 31
0x00 0x00 0x88 0x00
Mask
MB=16
ME=23
0 16 23 31
1111_1111
0000_0000
0000_0000_0000_0000