Xilinx Virtex-II Pro PPC405, Руководство пользователя

Страница: 101 / 562

March 2002 Release www.xilinx.com 409
Virtex-II Pro™ Platform FPGA Documentation 1-800-255-7778
Multiply-Accumulate Instruction-Set Extensions
R
Figure 3-29 shows the operation of the multiply-accumulate high-halfword to word
instructions.
Multiply-Accumulate High-Halfword to Word
Saturate Signed Instructions
r D is added to the signed product ( r A[0:15])
×
( r B[0:15]), producing
a 33-bit result. If the result does not overflow, the low-32 bits of this
result are stored in
r D. Otherwise, the nearest-representable value
is stored in r D.
machhws Multiply Accumulate High Halfword
to Word Saturate Signed
XER and CR0 are
not
updated.
r D, r A, r B
machhws. Multiply Accumulate High Halfword
to Word Saturate Signed and Record
CR0 is updated to reflect the result.
machhwso Multiply Accumulate High Halfword
to Word Saturate Signed with
Overflow Enabled
XER[OV,SO] are updated to reflect the result.
machhwso. Multiply Accumulate High Halfword
to Word Saturate Signed with
Overflow Enabled and Record
XER[OV,SO] and CR0 are updated to reflect the
result.
Multiply-Accumulate High-Halfword to Word
Saturate Unsigned Instructions
r D is added to the unsigned product ( r A[0:15])
×
( r B[0:15]),
producing a 33-bit result. If the result does not overflow, the low-32
bits of this result are stored in
r D. Otherwise, the nearest-
representable value is stored in r D.
machhwsu Multiply Accumulate High Halfword
to Word Saturate Unsigned
XER and CR0 are
not
updated.
r D, r A, r B
machhwsu. Multiply Accumulate High Halfword
to Word Saturate Unsigned and
Record
CR0 is updated to reflect the result.
machhwsuo Multiply Accumulate High Halfword
to Word Saturate Unsigned with
Overflow Enabled
XER[OV,SO] are updated to reflect the result.
machhwsuo. Multiply Accumulate High Halfword
to Word Saturate Unsigned with
Overflow Enabled and Record
XER[OV,SO] and CR0 are updated to reflect the
result.
Multiply-Accumulate High-Halfword to Word
Modulo Unsigned Instructions
r D is added to the unsigned product ( r A[0:15])
×
( r B[0:15]),
producing a 33-bit result. The low-32 bits of this result are stored in
r D.
machhwu Multiply Accumulate High Halfword
to Word Modulo Unsigned
XER and CR0 are
not
updated.
r D, r A, r B
machhwu. Multiply Accumulate High Halfword
to Word Modulo Unsigned and
Record
CR0 is updated to reflect the result.
machhwuo Multiply Accumulate High Halfword
to Word Modulo Unsigned with
Overflow Enabled
XER[OV,SO] are updated to reflect the result.
machhwuo. Multiply Accumulate High Halfword
to Word Modulo Unsigned with
Overflow Enabled and Record
XER[OV,SO] and CR0 are updated to reflect the
result.
Table 3-41: Multiply-Accumulate High-Halfword to Word Instructions (Continued)
Mnemonic Name Operation
Operand
Syntax