494
March 2002 Release
1-800-255-7778
Virtex-II Pro™ Platform FPGA Documentation
Chapter 7:
Exceptions and Interrupts
R
The contents of the machine-state register (MSR) are copied into one of two
save/restore registers, depending on the type of interrupt:
-
Critical interrupts load SRR3 with a copy of the MSR.
-
Noncritical interrupts load SRR1 with a copy of the MSR.
3.
Update the exception-syndrome register (ESR), if applicable.
Five exceptions report status information in the ESR when control is transferred to the
interrupt handler (ESR is not modified by the remaining exceptions):
-
Machine check.
-
Data storage.
-
Instruction storage.
-
Program.
-
Data TLB miss.
Interrupt handlers use the ESR to determine the cause of an exception.
4.
Update the data exception-address register (DEAR), if applicable.
Three exceptions report the address of a failed data access in the DEAR when control
is transferred to the interrupt handler (DEAR is not modified by the remaining
exceptions):
-
Data storage.
-
Alignment.
-
Data TLB miss.
5.
Load the new program state into the MSR.
All interrupts load new program state into the MSR. The new state places the
processor in privileged mode. Instruction-address and data-address translation are
disabled, placing the processor in real mode. Certain interrupts are disabled,
depending on the exception.
6.
Synchronize the processor context.
All interrupts are context synchronizing. The processor fetches and executes the first
instruction in the interrupt handler in the context established by the new MSR
contents.
7.
Transfer control to the interrupt handler.
An exception-vector offset is associated with each exception. The offset is added to a
64KB-aligned base address located in the exception-vector prefix register (EVPR). The
sum represents a physical address that points to the first instruction of the interrupt
handler.
Interrupt handlers are located in an interrupt-handler table. The available space in this
table is generally insufficient to hold entire interrupt handlers. Instead, system
software typically places “glue code” in the table for transferring control to the full
handler, located elsewhere in memory.
Returning from Interrupt Handlers
System software exits an interrupt handler using one of two privileged instructions.
Noncritical-interrupt handlers return to an interrupted program using the
return-from-
interrupt
instruction (
rfi
). Critical-interrupt handlers return to an interrupted program
using the
return-from-critical-interrupt
instruction (
rfci
). Both instructions operate in a
similar fashion, with the only difference being the save/restore register pair used to restore
the interrupted-program state.
rfi
and
rfci
perform the following functions:
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