626
March 2002 Release
1-800-255-7778
Virtex-II Pro™ Platform FPGA Documentation
Chapter 11:
Instruction Set
R
eieio
Enforce In Order Execution of I/O
Description
The
eieio
instruction enforces ordering of load and store operations. It ensures that all
loads and stores preceding
eieio
in program order complete with respect to main memory
before loads and stores following
eieio
access main memory. It is intended for use in
managing shared data structures, in accessing memory-mapped I/O, and in preventing
load/store combining operations in main memory.
With the exception of the
dcba
and
dcbz
instructions,
eieio
does not affect the order of
cache operations. This is true whether the cache operation is initiated explicitly by the
execution of a cache-control instruction, or implicitly during the normal operation of the
cache controller.
eieio
orders memory access, not instruction completion. Non-memory instructions
following
eieio
can complete before the memory operations ordered by
eieio
. The
sync
instruction is used to guarantee ordering of both instruction completion and storage
access. The PPC405 implements
eieio
and
sync
identically (this is permitted by the
PowerPC architecture). Programmers should use the appropriate ordering instruction to
maximize the performance of software that is portable between various PowerPC
implementations.
Pseudocode
Force prior memory accesses to complete before starting subsequent accesses
Registers Altered
•
None.
Exceptions
•
None.
Execution of any of the following invalid-instruction forms results in a boundedly-
undefined result rather than a program exception:
•
Reserved bits containing a non-zero value.
Compatibility
This instruction is defined by the virtual-environment architecture level (VEA) of the
PowerPC architecture and the PowerPC embedded-environment architecture. The
instruction is not part of the PowerPC Book-E architecture.
eieio
X Instruction Form
31
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
854
0
0
6
2
1
3
1
Содержание Virtex-II Pro PPC405
Страница 1: ...R Volume 2 a PPC405 User Manual Virtex II Pro Platform FPGA Developer s Kit March 2002 Release...
Страница 14: ...322 www xilinx com March 2002 Release 1 800 255 7778 Virtex II Pro Platform FPGA Documentation Preface R...
Страница 252: ...560 www xilinx com March 2002 Release 1 800 255 7778 Virtex II Pro Platform FPGA Documentation R...
Страница 260: ...568 www xilinx com March 2002 Release 1 800 255 7778 Virtex II Pro Platform FPGA Documentation R...
Страница 562: ...870 www xilinx com March 2002 Release 1 800 255 7778 Virtex II Pro Platform FPGA Documentation R...
