Omron CP1H CPU UNITS - PROGRAMMING 05-2007, Operation Manual

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High-speed Counters
Section 5-2
Lower and Upper Limits of the Range
The following diagrams show the lower limit and upper limit values for incre-
ment mode and up/down mode.
Circular (Ring) Mode Input pulses are counted in a loop within the set range. The loop operates as
follows:
• If the count is incremented from the max. ring count, the count will be
reset to 0 automatically and incrementing will continue.
• If the count is decremented from 0, the count will be set to the max. ring
count automatically and decrementing will continue.
Consequently, underflows and overflows cannot occur when ring mode is
used.
Max. Ring Count
Use the PLC Setup to set the max. ring count (Circular Max. Count), which is
the max. value of the input pulse counting range. The max. ring count can be
set to any value between 00000001 and FFFFFFFF hex.
Restrictions
• There are no negative values in ring mode.
• If the max. ring count is set to 0 in the PLC Setup, the counter will operate
with a max. ring count of FFFFFFFF hex.
Reset Methods
Phase-Z Software
Reset The high-speed counter's PV is reset when the phase-Z signal (reset input)
goes from OFF to ON while the corresponding High-speed Counter Reset Bit
is ON.
The CPU Unit recognizes the ON status of the High-speed Counter Reset Bit
only at the beginning of the PLC cycle during the overseeing processes. Con-
4294967295
(FFFFFFFF hex)
−
2147483648
(80000000 hex)
0
(00000000 hex)
+2147483647
(7FFFFFFF hex)
PV overflow
Increment Mode
Up/Down Mode
PV underflow
PV overflow
0
(000000 hex)
2
32
−
1
0
Count value
Max. ring
count