Omron CP1H CPU UNITS - PROGRAMMING 05-2007, Operation Manual

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I/O Area and I/O Allocations
Section 4-2
I/O Unit, or CPU Unit are automatically allocated. This word is indicated as
“CIO m” for input words and as “CIO n” for output words.
■
I/O Bit Addresses
Units 8 Input Points (CP1W-8ED/CPM1A-8ED)
Eight input bits are allocated in one word (bits 00 to 07 in CIO m).
Only one word (8 bits) is allocated to an 8-input Expansion Input Unit. No out-
put words are allocated. Input bits 08 to 15 are always cleared by the system
and cannot be used as work bits.
Units with 8 Output Points (CP1W-8E
@@
/CPM1A-8E
@@
)
Eight output bits are allocated in one word (bits 00 to 07 in CIO n+1).
Only one word (8 bits) is allocated to an 8-output Expansion Output Unit. No
input words are allocated. Output bits 08 to 15 can be used as work bits.
Unit Input bits Output bits
No. of
bits
No. of
words Addresses No. of
bits
No. of
words
Addresses
Unit with 8 inputs CP1W-8ED
CPM1A-8ED 8 bits 1 word CIO m (bits 00 to 07) --- None None
Unit with
8 outputs Relays CP1W-8ER
CPM1A-8ER --- None None 8 bits 1 word CIO n (bits 00 to 07)
Sinking
transistors CP1W-8ET
CPM1A-8ET --- None None 8 bits 1 word CIO n (bits 00 to 07)
Sourcing
transistors CP1W-8ET1
CPM1A-8ET1 --- None None 8 bits 1 word CIO n (bits 00 to 07)
Unit with
16 out-
puts Relays CP1W-16ER
CPM1A-16ER --- None None 16 bits 2 words CIO n (bits 00 to 07)
CIO n+1 (bits 00 to 07)
Sinking
transistors CP1W-16ET --- None None 16 bits 2 words CIO n (bits 00 to 07)
CIO n+1 (bits 00 to 07)
Sourcing
transistors CP1W-16ET1 --- None None 16 bits 2 words CIO n (bits 00 to 07)
CIO n+1 (bits 00 to 07)
Unit with
20 I/O Relays CP1W-20EDR1
CPM1A-20EDR1 12 bits 1 word CIO m (bits 00 to 11) 8 bits 1 word CIO n (bits 00 to 07)
Sinking
transistors CP1W-20EDT
CPM1A-20EDT 12 bits 1 word CIO m (bits 00 to 11) 8 bits 1 word CIO n (bits 00 to 07)
Sourcing
transistors CP1W-20EDT1
CPM1A-20EDT1 12 bits 1 word CIO m (bits 00 to 11) 8 bits 1 word CIO n (bits 00 to 07)
Unit
with 32
outputs Relays CP1W-32ER --- None None 32 bits 4 words CIO n (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+2 (bits 00 to 07)
CIO n+3 (bits 00 to 07)
Sinking
transistors CP1W-32ET --- None None 32 bits 4 words CIO n (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+2 (bits 00 to 07)
CIO n+3 (bits 00 to 07)
Sourcing
transistors CP1W-32ET1 --- None None 32 bits 4 words CIO n (bits 00 to 07)
CIO n+1 (bits 00 to 07)
CIO n+2 (bits 00 to 07)
CIO n+3 (bits 00 to 07)
Unit with
40 I/O Relays CP1W-40EDR
CPM1A-40EDR 24 bits 2 words CIO m (bits 00 to 11)
CIO m+1 (bits 00 to 11)
16 bits 2 words CIO n (bits 00 to 07)
CIO n+1 (bits 00 to 07)
Sinking
transistors CP1W-40EDT
CPM1A-40EDT 24 bits 2 words CIO m (bits 00 to 11)
CIO m+1 (bits 00 to 11)
16 bits 2 words CIO n (bits 00 to 07)
CIO n+1 (bits 00 to 07)
Sourcing
transistors CP1W-40EDT1
CPM1A-40EDT1 24 bits 2 words CIO m (bits 00 to 11)
CIO m+1 (bits 00 to 11)
16 bits 2 words CIO n (bits 00 to 07)
CIO n+1 (bits 00 to 07)
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
m
Do not use.
Inputs
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
n
Can be used as work bits.
Outputs