Appendix A
Release Notes for Revision 5
A.1 General changes throughout
• Corrected Flash memory information in Chapter - 4.
• Updated status of COP Watchdog from static to functional under Stop and VLPS modes in Table 7-2. Module
operation in low power modes. Also added 12-bit DAC description.
• Added a note to the section 11.2, "Port control and interrupt summary".
• Removed the following information: "The LK bit (bit 15 of Pin Control Register PCR
n
) locks the lower 16 bits of each
Pin Control register and blocks any writes to that register until the next system reset."
• Added "COP watchdog operation" section to the System Integration Module (SIM) chapter.
• Added chip-specific section (detailing about peripheral pinmux specification) to the Kinetis ROM Bootloader chapter.
• Added ReadMemory command in Table 13-2. Commands supported by the Kinetis Bootloader in ROM.
• Updated descriptions of the following configuration fields:
enabledPeripherals
,
i2cSlaveAddress
,
peripheralDetectionTimeout
,
clockDivider
in Table 13-3. Configuration Fields for the Kinetis Bootloader.
• Corrected Oscillator frequency range from 1–8 MHz to 3–8 MHz.
• Added chip-specific SPI information clarifying the differences and instantiation details of the SPI peripheral.
• Added chip-specific FlexIO information to Flexible I/O (FlexIO) chapter.
• Removed support of BME accessing RAM from Bit Manipulation Engine (BME) chapter.
A.2 About This Document chapter changes
No substantial content changes
A.3 Introduction chapter changes
No substantial content changes
A.4 Core Overview chapter changes
No substantial content changes
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Freescale Semiconductor, Inc.
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