NXP Semiconductors MKL27Z128VFM4, Reference Manual

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Table 10-11. TPM1 signal descriptions
Chip signal name Module signal
name
Description I/O
TPM_CLKIN[1:0] TPM_EXTCLK External clock. TPM external clock can be selected to increment the
TPM counter on every rising edge synchronized to the counter
clock. I
TPM1_CH[1:0] TPM_CHn TPM channel (n = 1 to 0). A TPM channel pin is configured as
output when configured in an output compare or PWM mode and
the TPM counter is enabled, otherwise the TPM channel pin is an
input. I/O
Table 10-12. TPM2 signal descriptions
Chip signal name Module signal
name
Description I/O
TPM_CLKIN[1:0] TPM_EXTCLK External clock. TPM external clock can be selected to increment the
TPM counter on every rising edge synchronized to the counter
clock. I
TPM2_CH[1:0] TPM_CHn TPM channel (n = 1 to 0). A TPM channel pin is configured as
output when configured in an output compare or PWM mode and
the TPM counter is enabled, otherwise the TPM channel pin is an
input. I/O
Table 10-13. LPTMR0 signal descriptions
Chip signal name Module signal
name
Description I/O
LPTMR0_ALT[3:1] LPTMR0_ALT n Pulse Counter Input pin I
Table 10-14. RTC signal descriptions
Chip signal name Module signal
name
Description I/O
RTC_CLKOUT
1
RTC_CLKOUT 1 Hz square-wave output or OSCERCLK O
1. RTC_CLKOUT can also be driven with OSCERCLK via SIM control bit SIM_SOPT[RCTCLKOUTSEL]
10.5.6 Communication interfaces
Table 10-15. USB FS OTG Signal Descriptions
Chip signal name Module signal
name
Description I/O
USB0_DM usb_dm USB D- analog data signal on the USB bus. I/O
USB0_DP usb_dp USB D+ analog data signal on the USB bus. I/O
USB_CLKIN — Alternate USB clock input I
Chapter 10 Pinouts and Packaging
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Freescale Semiconductor, Inc. 121