UARTx_C1 field descriptions (continued)
Field
Description
0
Normal operation.
1
Loop mode where transmitter output is internally connected to receiver input. The receiver input is
determined by RSRC.
6
Reserved
Reserved.
This field is reserved.
5
RSRC
Receiver Source Select
This field has no meaning or effect unless the LOOPS field is set. When LOOPS is set, the RSRC field
determines the source for the receiver shift register input.
0
Selects internal loop back mode. The receiver input is internally connected to transmitter output.
1
Single wire UART mode where the receiver input is connected to the transmit pin input signal.
4
M
9-bit or 8-bit Mode Select
This field must be set when C7816[ISO_7816E] is set/enabled.
0
Normal—start + 8 data bits (MSB/LSB first as determined by MSBF) + stop.
1
Use—start + 9 data bits (MSB/LSB first as determined by MSBF) + stop.
3
WAKE
Receiver Wakeup Method Select
Determines which condition wakes the UART:
• Address mark in the most significant bit position of a received data character, or
• An idle condition on the receive pin input signal.
0
Idle line wakeup.
1
Address mark wakeup.
2
ILT
Idle Line Type Select
Determines when the receiver starts counting logic 1s as idle character bits. The count begins either after
a valid start bit or after the stop bit. If the count begins after the start bit, then a string of logic 1s preceding
the stop bit can cause false recognition of an idle character. Beginning the count after the stop bit avoids
false idle character recognition, but requires properly synchronized transmissions.
NOTE:
• In case the UART is programmed with ILT = 1, a logic of 1'b0 is automatically shifted after a
received stop bit, therefore resetting the idle count.
• In case the UART is programmed for IDLE line wakeup (RWU = 1 and WAKE = 0), ILT has
no effect on when the receiver starts counting logic 1s as idle character bits. In idle line
wakeup, an idle character is recognized at anytime the receiver sees 10, 11, or 12 1s
depending on the M, PE, and C4[M10] fields.
0
Idle character bit count starts after start bit.
1
Idle character bit count starts after stop bit.
1
PE
Parity Enable
Enables the parity function. When parity is enabled, parity function inserts a parity bit in the bit position
immediately preceding the stop bit. This field must be set when C7816[ISO_7816E] is set/enabled.
0
Parity function disabled.
1
Parity function enabled.
0
PT
Parity Type
Table continues on the next page...
Memory map and registers
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
684
Freescale Semiconductor, Inc.
