38.5.4.3.5 Non-memory mapped tenth bit for parity
The most significant memory-mapped bit can be used for address mark wakeup.
BIT 1 BIT 2 BIT 3
BIT 4 BIT 5 BIT 6 BIT 7 BIT 8 PARITY
STOP
BIT
START
BIT
START
BIT
BIT 0
ADDRESS
MARK
Figure 38-20. Nine bits of data with LSB first and parity
BIT 7 BIT 6 BIT 5
BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 PARITY
STOP
BIT
START
BIT
START
BIT
BIT 8
ADDRESS
MARK
Figure 38-21. Nine bits of data with MSB first and parity
38.5.5 Single-wire operation
Normally, the UART uses two pins for transmitting and receiving. In single wire
operation, the RXD pin is disconnected from the UART and the UART implements a
half-duplex serial connection. The UART uses the TXD pin for both receiving and
transmitting.
RXD
Tx pin input
Tx pin output
TXINV
TRANSMITTER
RECEIVER
RXINV
Figure 38-22. Single-wire operation (C1[LOOPS] = 1, C1[RSRC] = 1)
Enable single wire operation by setting C1[LOOPS] and the receiver source field,
C1[RSRC]. Setting C1[LOOPS] disables the path from the unsynchronized receiver input
signal to the receiver. Setting C1[RSRC] connects the receiver input to the output of the
TXD pin driver. Both the transmitter and receiver must be enabled (C2[TE] = 1 and
C2[RE] = 1). When C7816[ISO_7816EN] is set, it is not required that both C2[TE] and
C2[RE] are set.
38.5.6 Loop operation
In loop operation, the transmitter output goes to the receiver input. The unsynchronized
receiver input signal is disconnected from the UART.
Chapter 38 Universal Asynchronous Receiver/Transmitter(UART)
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Freescale Semiconductor, Inc.
729
