NXP Semiconductors MKL27Z128VFM4, Reference Manual

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SAMPLES
Rx pin input
RT CLOCK
RT CLOCK COUNT
RESET RT CLOCK
1 1 1 1 0 0
START BIT
LSB
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T2
R
T3
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
NO START BIT FOUND
1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
R
T4
R
T5
R
T6
R
T7
R
T1
R
T1
R
T1
Figure 38-8. Start bit search example 5 (C7816[ISO_7816E] = 0)
In the following figure, a noise burst makes the majority of data samples RT8, RT9, and
RT10 high. In this example C7816[ISO_7816E] = 0. This sets the noise flag but does not
reset the RT clock. In start bits only, the RT8, RT9, and RT10 data samples are ignored.
In this example, if C7816[ISO_7816E] = 1 then a start bit would not have been detected
at all since at least two of the three samples (RT8, RT9, RT10) were high.
SAMPLES
Rx pin input
RT CLOCK
RT CLOCK COUNT
RESET RT CLOCK
1 1 1 1
0 0
START BIT LSB
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T1
R
T2
R
T3
R
T1
0
R
T1
R
T2
R
T3
1 1 1 1 1
0 0 1 0 1
R
T4
R
T5
R
T6
R
T7
R
T8
R
T9
R
T1
1
R
T1
2
R
T1
3
R
T1
4
R
T1
5
R
T1
6
Figure 38-9. Start bit search example 6
38.5.2.5 Framing errors
If the data recovery logic does not detect a logic 1 where the stop bit should be in an
incoming frame, it sets the framing error flag, S1[FE]. A break character also sets the
S1[FE] because a break character has no stop bit. S1[FE] is set at the same time that
received data is placed in the receive data buffer. Framing errors are not supported when
C7816[ISO7816E] is set/enabled. However, if S1[FE] is set, data will not be received
when C7816[ISO7816E] is set.
Chapter 38 Universal Asynchronous Receiver/Transmitter(UART)
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Freescale Semiconductor, Inc. 719