6.2.2.4 Low leakage wakeup (LLWU)
The LLWU module provides the means for a number of external pins to wake the MCU
from low leakage power modes. The LLWU module is functional only in low leakage
power modes. In VLLSx modes, all enabled inputs to the LLWU can generate a system
reset.
After a system reset, the LLWU retains the flags indicating the input source of the last
wakeup until the user clears them.
NOTE
Some flags are cleared in the LLWU and some flags are
required to be cleared in the peripheral module. Refer to the
individual peripheral chapters for more information.
6.2.2.5 Stop mode acknowledge error (SACKERR)
This reset is generated if the core attempts to enter Stop mode or Compute Operation, but
not all modules acknowledge Stop mode within 1025 cycles of the 1 kHz LPO clock.
A module might not acknowledge the entry to Stop mode if an error condition occurs.
The error can be caused by a failure of an external clock input to a module.
6.2.2.6 Software reset (SW)
The SYSRESETREQ field in the NVIC Application Interrupt and Reset Control register
can be set to force a software reset on the device. (See ARM's NVIC documentation for
the full description of the register fields, especially the VECTKEY field requirements.)
Setting SYSRESETREQ generates a software reset request. This reset forces a system
reset of all major components except for the debug module. A software reset causes
RCM_SRS1[SW] to set.
6.2.2.7 Lockup reset (LOCKUP)
The LOCKUP gives immediate indication of seriously errant kernel software. This is the
result of the core being locked because of an unrecoverable exception following the
activation of the processor’s built in system state protection hardware.
The LOCKUP condition causes a system reset and also causes RCM_SRS1[LOCKUP] to
set.
Reset
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
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Freescale Semiconductor, Inc.
