![NXP Semiconductors MKL27Z128VFM4 Reference Manual Download Page 456](http://html1.mh-extra.com/html/nxp-semiconductors/mkl27z128vfm4/mkl27z128vfm4_reference-manual_1721847456.webp)
29.1.1 TPM instantiation information
This device contains three low power TPM modules (TPM). All TPM modules in the
device are configured only as basic TPM function, do not support quadrature decoder
function, and all can be functional in Stop/VLPS mode. The clock source is either
external or internal in Stop/VLPS mode.
The following table shows how these modules are configured.
Table 29-2. TPM configuration
TPM instance
Number of channels
Features/usage
TPM0
6
Basic TPM, functional in Stop/VLPS mode
TPM1
2
Basic TPM, functional in Stop/VLPS mode
TPM2
2
Basic TPM, functional in Stop/VLPS mode
There are several connections to and from the TPMs in order to facilitate customer use
cases. For complete details on the TPM module interconnects please refer to the
29.1.2 Clock options
The TPM blocks are clocked from a single TPM clock that can be selected from
OSCERCLK, MCGIRCLK, or MCGPCLK. The selected source is controlled by
SIM_SOPT2[TPMSRC] .
Each TPM also supports an external clock mode (TPM_SC[CMOD]=1x) in which the
counter increments after a synchronized (to the selected TPM clock source) rising edge
detect of an external clock input. The available external clock (either TPM_CLKIN0 or
TPM_CLKIN1) is selected by SIM_SOPT4[TPMxCLKSEL] control register. To
guarantee valid operation the selected external clock must be less than half the frequency
of the selected TPM clock source.
Chip-specific TPM information
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
456
Freescale Semiconductor, Inc.