37.4.3.2 Receiver wakeup operation
Receiver wakeup and receiver address matching is a hardware mechanism that allows an
LPUART receiver to ignore the characters in a message intended for a different receiver.
During receiver wakeup, all receivers evaluate the first character(s) of each message, and
as soon as they determine the message is intended for a different receiver, they write
logic 1 to the receiver wake up control bit (LPUART_CTRL[RWU]). When RWU bit
and LPUART_S2[RWUID] bit are set, the status flags associated with the receiver, with
the exception of the idle bit, IDLE, are inhibited from setting, thus eliminating the
software overhead for handling the unimportant message characters. At the end of a
message, or at the beginning of the next message, all receivers automatically force
LPUART_CTRL[RWU] to 0 so all receivers wake up in time to look at the first
character(s) of the next message.
During receiver address matching, the address matching is performed in hardware and the
LPUART receiver will ignore all characters that do not meet the address match
requirements.
Table 37-2. Receiver Wakeup Options
RWU
MA1 | MA2
MATCFG
WAKE:RWUID
Receiver Wakeup
0
0
X
X
Normal operation
1
0
00
00
Receiver wakeup on
idle line, IDLE flag not
set
1
0
00
01
Receiver wakeup on
idle line, IDLE flag set
1
0
00
10
Receiver wakeup on
address mark
1
1
11
X0
Receiver wakeup on
data match
0
1
00
X0
Address mark address
match, IDLE flag not set
for discarded
characters
0
1
00
X1
Address mark address
match, IDLE flag set for
discarded characters
0
1
01
X0
Idle line address match
0
1
10
X0
Address match on and
address match off,
IDLE flag not set for
discarded characters
0
1
10
X1
Address match on and
address match off,
IDLE flag set for
discarded characters
Functional description
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
670
Freescale Semiconductor, Inc.
