NXP Semiconductors MKL27Z128VFM4, Reference Manual

Page: 397 / 939

24.3 Memory map/register definitions
CMP memory map
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4007_3000 CMP Control Register 0 (CMP0_CR0) 8 R/W 00h 24.3.1/397
4007_3001 CMP Control Register 1 (CMP0_CR1) 8 R/W 00h 24.3.2/398
4007_3002 CMP Filter Period Register (CMP0_FPR) 8 R/W 00h 24.3.3/399
4007_3003 CMP Status and Control Register (CMP0_SCR) 8 R/W 00h 24.3.4/400
4007_3004 DAC Control Register (CMP0_DACCR) 8 R/W 00h 24.3.5/401
4007_3005 MUX Control Register (CMP0_MUXCR) 8 R/W 00h 24.3.6/401
24.3.1 CMP Control Register 0 (CMPx_CR0)
Address: 4007_3000h base + 0h offset = 4007_3000h
Bit 7 6 5 4 3 2 1 0
Read 0
FILTER_CNT
0 0
HYSTCTR
Write
Reset 0 0 0 0 0 0 0 0
CMPx_CR0 field descriptions
Field Description
7
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
6–4
FILTER_CNT
Filter Sample Count
Represents the number of consecutive samples that must agree prior to the comparator ouput filter
accepting a new output state. For information regarding filter programming and latency, see the
Functional
description .
000 Filter is disabled. SE = 0, COUT = COUTA.
001 One sample must agree. The comparator output is simply sampled.
010 2 consecutive samples must agree.
011 3 consecutive samples must agree.
100 4 consecutive samples must agree.
101 5 consecutive samples must agree.
110 6 consecutive samples must agree.
111 7 consecutive samples must agree.
3
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
2
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
Table continues on the next page...
Chapter 24 Comparator (CMP)
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Freescale Semiconductor, Inc. 397