UARTx_S1 field descriptions (continued)
Field
Description
0
No parity error detected.
1
Parity error.
38.4.6 UART Status Register 2 (UARTx_S2)
The S2 register provides inputs to the MCU for generation of UART interrupts or DMA
requests. Also, this register can be polled by the MCU to check the status of these bits.
This register can be read or written at any time, with the exception of the MSBF and
RXINV bits, which should be changed by the user only between transmit and receive
packets.
Address: 4006_C000h base + 5h offset = 4006_C005h
Bit
7
6
5
4
3
2
1
0
Read
Write
Reset
0
0
0
0
0
0
0
0
UARTx_S2 field descriptions
Field
Description
7
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
6
RXEDGIF
RxD Pin Active Edge Interrupt Flag
RXEDGIF is set when an active edge occurs on the RxD pin. The active edge is falling if RXINV = 0, and
rising if RXINV=1. RXEDGIF is cleared by writing a 1 to it. See for additional details.
NOTE: The active edge is detected only in two wire mode and on receiving data coming from the RxD
pin.
0
No active edge on the receive pin has occurred.
1
An active edge on the receive pin has occurred.
5
MSBF
Most Significant Bit First
Setting this field reverses the order of the bits that are transmitted and received on the wire. This field
does not affect the polarity of the bits, the location of the parity bit, or the location of the start or stop bits.
This field is automatically set when C7816[INIT] and C7816[ISO7816E] are enabled and an initial
character is detected in T = 0 protocol mode.
0
LSB (bit0) is the first bit that is transmitted following the start bit. Further, the first bit received after the
start bit is identified as bit0.
1
MSB (bit8, bit7 or bit6) is the first bit that is transmitted following the start bit, depending on the setting
of C1[M] and C1[PE]. Further, the first bit received after the start bit is identified as bit8, bit7, or bit6,
depending on the setting of C1[M] and C1[PE].
4
RXINV
Receive Data Inversion
Table continues on the next page...
Chapter 38 Universal Asynchronous Receiver/Transmitter(UART)
KL27 Sub-Family Reference Manual , Rev. 5, 01/2016
Freescale Semiconductor, Inc.
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