Keysight Technologies D9020DDRC, Manual

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16 Data Timing Tests
296 DDR2(+LP) Compliance Testing Methods of Implementation
Measurement Algorithm
1 Acquire and split read and write burst of the acquired signal. (See notes on DDR read/write
separation).
2 Take the first valid WRITE burst found.
3 Find all valid rising DQ crossings that cross V
IL(DC)
in the said burst. (See notes on threshold)
4 Find all valid falling DQ crossings that cross V
IH(DC)
in the same burst. (See notes on threshold)
5 For all DQ crossings found, locate all next DQS crossings that cross 0V. (See notes on threshold)
6 tDH is defined as the time between the DQ crossing and the DQS crossing.
7 Collect all tDH.
8 Find the worst tDH among the measured value and report the value as the test result.
9 Measure nominal slew rate on the DQ and DQS edges where worst tDH is found.
• For DQ Falling, Slew Rate = (V
REF
- V
IL(DC)
)/tF
• For DQ Rising, Slew Rate = (V
IH(DC)
- V
REF
)/tR
tF and tR are the transition time respectively.
• For DQS Rising, Slew Rate = (V
HITHRES
- 0V)/tR
• For DQS Falling, Slew Rate = (0V - V
LOTHRES
)/tF
tF and tR are the transition time respectively.
10 Report nominal slew rate for DQ and DQS.
11 Measure tangent slew rate on the DQ and DQS edges where worst tDH is found. The
measurement is similar to nominal slew rate, except the transition time is break into 10 parts and
slew rate is measured from a a pivot point (V
REF
or 0V) to all the 10 points. Tangent slew rate is
the maximum slew rates measured.
12 Report tangent slew rate for DQ and DQS.