Keysight Technologies D9020DDRC, Manual

Page: 206 / 370

13 Differential Signals Strobe Cross Point Voltage Tests
190 DDR2(+LP) Compliance Testing Methods of Implementation
V
IXDQ
, Strobe Cross Point Voltage - Test Method of Implementation
The purpose of this test is to verify the crossing point voltage value of the input differential Strobe
signals pair is within the conformance limits of the V
IXDQ
as specified in the JEDEC specification.
Signals of Interest
Mode Supported: LPDDR2 only
Signal cycle of interest: Write
Signal(s) of Interest:
• Data Strobe Signals (supported by Data Signals)
Signals required to perform the test on the oscilloscope:
• Pin Under Test, PUT - Data Strobe Signals
• Supported Pin - Data Signals
Test Definition Notes from the Specification
Test References
See Table 80 - Cross Point Voltage for Differential Input Signals (CK, DQS) in the JESD209-2B .
PASS Condition
The measured crossing point value for the differential Clock signals pair should be within the
conformance limits of V
IXDQ
value.
Measurement Algorithm
1 Obtain sample or acquire data waveforms.
2 Use Subtract FUNC to generate the differential waveform from the two source inputs.
3 Split read and write bursts of the acquired signal.
4 Take the first valid WRITE burst found.
5 Find all differential DQS crossings that cross 0V.
6 Use V
TIME
to get the actual crossing point voltage value by using the timestamp obtained.
7 Determine the worst result from the set of V
IXDQ
measured.
Table 116 Cross Point Voltage for Differential Input Signals (CK, DQS)
Symbol Parameter LPDDR2-1066 to LPDDR2-200 Units Notes
Min Max
V
IXDQ
Differential input cross point voltage relative to V
DDCA
/2 for CK_t, CK_c -120 120 mV 1, 2