Keysight Technologies D9020DDRC, Manual

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16 Data Timing Tests
288 DDR2(+LP) Compliance Testing Methods of Implementation
Measurement Algorithm
1 Acquire and split read and write burst of the acquired signal.
2 Take the first valid WRITE burst found.
3 Find all valid rising DQ crossings that cross V
IL(DC)
in the burst.
4 Find all valid falling DQ crossings that cross V
IH(DC)
in the same burst.
5 For all DQ crossings found, locate all prior DQS rising crossings that cross V
IH(AC)
and all prior
DQS falling crossings that cross V
IL(AC)
.
6 tDH1 is defined as the time between the DQ crossing and the DQS crossing.
7 Collect all tDH1.
8 Find the worst tDH1 among the measured values and report the value as the test result.
9 Measure the mean slew rate for all the DQ and DQS edges.
10 Use the mean slew rate for DQ and DQS to determine the ∆tDH1 derating value based on the
derating tables.
11 The test limit for tDH1 test = tDH1(base) + ∆tDH1.