Keysight Technologies D9020DDRC, Manual

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DDR2(+LP) Compliance Testing Methods of Implementation 309
Command and Address Timing (CAT) Tests 17
Test References
See Table 41 - Timing Parameters by Speed Grade (DDR2-400 and DDR2-533) and Table 42 -
Timing Parameters by Speed Grade (DDR2-667 and DDR2-800) in the
JEDEC Standard JESD79-2E .
See Table 46 - Derating Values for DDR2- 400, DDR2- 533 and Table 47 - Derating Values for
DDR2- 667, DDR2- 800 in the in the
JEDEC Standard JESD79-2E .
Table 218 Derating Values LPDDR2 tDS/tDH - AC/DC based AC300
∆
tDS,
∆
tDH derating in [ps] AC/DC based
AC300 Threshold -> V
IH(AC)
= V
REF(DC)
+ 300mV, V
IL(AC)
= V
REF(DC)
- 300mV
DC200 Threshold -> V
IH(DC)
= V
REF(DC)
+ 200mV, V
IL(DC)
= V
REF(DC)
- 200mV
DQS_t, DQS_c Differential Slew Rate
4.0 V/ns 3.0 V/ns 2.0 V/ns 1.8 V/ns
∆
tIS
∆
tIH
∆
tIS
∆
tIH
∆
tIS
∆
tIH
∆
tIS
∆
tIH
CA, CS_n Slew
Rate V/ns 2.0 150 100 150 100 150 100 - -
1.5 100 67 100 67 100 67 116 83
1.0 0 0 0 0 0 0 16 16
0.9 - - -4 -8 -4 -8 12 8
0.8 - - - - -12 -20 4 -4
0.7 - - - - - - -3 -18
0.6 - - - - - - - -
0.5 - - - - - - - -
0.4 - - - - - - - -
∆
tDS,
∆
tDH derating in [ps] AC/DC based
AC300 Threshold -> V
IH(AC)
= V
REF(DC)
+ 300mV, V
IL(AC)
= V
REF(DC)
- 300mV
DC200 Threshold -> V
IH(DC)
= V
REF(DC)
+ 200mV, V
IL(DC)
= V
REF(DC)
- 200mV
DQS_t, DQS_c Differential Slew Rate
1.6 V/ns 1.4 V/ns 1.2 V/ns 1.0 V/ns
∆
tIS
∆
tIH
∆
tIS
∆
tIH
∆
tIS
∆
tIH
∆
tIS
∆
tIH
CA, CS_n Slew
Rate V/ns 2.0 - - - - - - - -
1.5 - - - - - - - -
1.0 32 32 - - - - - -
0.9 28 24 44 40 - - - -
0.8 20 12 36 28 52 48 - -
0.7 13 -2 29 14 45 34 61 66
0.6 2 -21 18 -5 34 15 50 47
0.5 - - -12 -32 4 -12 20 20
0.4 - - - - -35 -40 -11 -8