16
Data Timing Tests
262
DDR2(+LP) Compliance Testing Methods of Implementation
Test References
See Table 41 - Timing Parameters by Speed Grade (DDR2-400 and DDR2-533) and Table 42 -
Timing Parameters by Speed Grade (DDR2-667 and DDR2-800) in the
JEDEC Standard JESD79-2E
.
See Table 41 - Timing Parameters by Speed Grade (DDR2-1066) in the
JESD208
.
Also see Table 108 - Data Setup and Hold Base- Values in the
JESD208-2B
.
PASS Condition
The worst measured tDH shall be within the specification limit.
Measurement Algorithm
1 Acquire and split read and write burst of the acquired signal.
2 Take the first valid WRITE burst found.
3 Find all valid rising DQ crossings that cross V
IH(DC)
in the burst.
4 Find all valid falling DQ crossings that cross V
IL(DC)
in the same burst.
5 For all DQ crossings found, locate all next DQS crossings that cross 0V.
6 tDH is defined as the time between the DQ crossing and the DQS crossing.
7 Collect all tDH.
8 Find the worst tDH among the measured values and report the value as the test result.
9 Measure the nominal slew rate on the DQ and DQS edges where the worst tDH was found.
• For DQ Falling, Slew Rate = (V
REF
- V
IL(DC)
) / tF
• For DQ Rising, Slew Rate = (V
IH(DC)
- V
REF
) / tR
tF and tR are the transition time respectively.
• For DQS Rising, Slew Rate = (V
HITHRES
- 0V) / tR
• For DQS Falling, Slew Rate = (0V - V
LOTHRES
) / tF
tF and tR are the transition time respectively.
10 Report the nominal slew rate for DQ and DQS.
11 Measure the tangent slew rate on the DQ and DQS edges where worst tDH was found. The
measurement is similar to nominal slew rate, except the transition time is broken into ten parts
and the slew rate is measured from a pivot point (V
REF
or 0V) to each of the ten points. Tangent
slew rate is the maximum slew rates measured.
12 Report tangent slew rate for DQ and DQS.
Symbol
LPDDR2
Units
Specific Notes
400
333
266
200
tDH(base)
280
400
550
800
ps
V
IH/L(DC)
= V
REF(DC)
+/- 200mV
Summary of Contents for D9020DDRC
Page 1: ...Keysight D9020DDRC DDR2 LP Compliance Test Application Methods of Implementation ...
Page 10: ...10 DDR2 LP Compliance Testing Methods of Implementation ...
Page 46: ...2 Preparing to Take Measurements 30 DDR2 LP Compliance Testing Methods of Implementation ...
Page 70: ...3 Measurement Clock Tests 54 DDR2 LP Compliance Testing Methods of Implementation ...
Page 224: ...14 Clock Timing CT Tests 208 DDR2 LP Compliance Testing Methods of Implementation ...
Page 270: ...15 Data Strobe Timing DST Tests 254 DDR2 LP Compliance Testing Methods of Implementation ...