Infineon Technologies TC1796, Руководство пользователя

Страница: 333 / 2150

TC1796
System Units (Vol. 1 of 2)
On-Chip System Buses and Bus Bridges
User’s Manual 6-40 V2.0, 2007-07
Buses, V2.0
ACK [20:19] rwh State of FPI Bus Acknowledge Signals
This bit field indicates the acknowledge code that has
been output by the selected slave at an FPI Bus
error. Coding see
Table 6-10 .
SVM 21 rwh State of FPI Bus Supervisor Mode Signal
This bit indicates whether the FPI Bus error occurred
in supervisor mode or in user mode.
0
B
Transfer was initiated in supervisor mode.
1
B
Transfer was initiated in user modes.
WRN 22 rwh State of FPI Bus Write Signal
This bit indicates whether the FPI Bus error occurred
at a write cycle (see
Table 6-15 ).
RDN 23 rwh State of FPI Bus Read Signal
This bit indicates whether the FPI Bus error occurred
at a read cycle (see
Table 6-15 ).
TAG [27:24] rwh FPI Bus Master Tag Number Signals
This bit field indicates the FPI Bus master TAG
number (definitions see
Table 6-11 ).
OPC [31:28] rwh FPI Bus Operation Code Signals
The FPI Bus operation codes are defined in
Table 6-12 .
1) For the SBCU_ECON.ERRCNT bit field, the following additional sentence must be added: in the TC1796,
aborted accesses to a 0 wait state SPB slave may also increment ERRCNT when the slave generates an error
acknowledge.
Table 6-15 FPI Bus Read/Write Error Indication
RD WR FPI Bus Cycle
0 0 FPI Bus error occurred at the read transfer of a read-modify-write
transfer.
0 1 FPI Bus error occurred at a read cycle of a single transfer.
1 0 FPI Bus error occurred at a write cycle of a single transfer or at the
write cycle of a read-modify-write transfer.
1 1 Does not occur
Field Bits Type Description