Toshiba TMPR4925, Manual

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Chapter 17 Serial Peripheral Interface
17-14
17.4.5 SPI Status Register (SPSR) 0xF814
31 16
Reserved
: Type
: Initial value
15 14 13 11 10 8 7 6 4 3 2 1 0
TBSI RBSI TBS RBS SPOE Reserved IFSD SIDLE
STRDY SRRDY
R R R R R/C R R R R : Type
1 0 000 000 0 0 1 1 0 : Initial value
Bits Mnemonic Field Name Explanation
31:16
⎯
Reserved
⎯
15 TBSI Transmit Buffer
Status Indicator Transmit Buffer Status Indicator (Initial value: 1, R)
This bit indicates a transmit fill level interrupt.
0: Interrupt have been generated
1: Interrupt have not been generated
14 RBSI Receive Buffer
Status Indicator Receive Buffer Status Indicator (Initial value: 0, R)
This bit indicates a receive fill level interrupt.
0: Interrupt have been generated
1: Interrupt have not been generated
13:11 TBS
Transmit Buffer
Status Transmit Buffer Status (Initial value: 000, R)
The field shows the status of the transmit buffer.
000: Transmit Buffer Empty
001: 1 transfer stored
010: 2 transfers stored
011: 3 transfers stored
100: 4 transfers stored, Buffer full
101 – 111: Not Available
10:8 RBS Receive Buffer
Status Receive Buffer Status (Initial value: 000, R)
The field shows the status of the receive buffer.
000: Receive Buffer Empty
001: 1 transfer stored
010: 2 transfers stored
011: 3 transfers stored
100: 4 transfers stored, Buffer full
101 – 111: Not Available
7 SPOE SPI Overrun Error SPI Overrun Error (Initial value: 0, R/C)
This flag indicates that a value in the transmit buffer has been overwritten, before it
could be sent. It can be cleared by writing a “1” value to it. This flag will be cleared
by setting the module in configuration mode.
Read:
0: no error
1: Overrun error occurred
Write:
0: Don’t care
1: Clear
6:4
⎯
Reserved
⎯
Figure 17.4.5 SPI Status Register (SPSR) (1/2)