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Chapter 30 Flash Memory
MPC5606BK Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor
865
UMISR4
= 0x00000000;
/* Reset UMISR4 content */
UT0
= 0xF9F99999;
/* Set UTE in UT0: Enable User Test */
LMS
= 0x00000006;
/* Set LSL2-1 in LMS: Select Sectors */
UT0
= 0x80000004;
/* Set AIS in UT0: Select Operation */
UT0
= 0x80000024;
/* Set MRE in UT0: Select Operation */
UT0
= 0x80000034;
/* Set MRV in UT0: Select Margin versus 1’s */
UT0
= 0x80000036;
/* Set AIE in UT0: Operation Start */
do
/* Loop to wait for AID=1 */
{ tmp = UT0;
/* Read UT0 */
} while ( !(tmp & 0x00000001) );
data0
= UMISR0;
/* Read UMISR0 content*/
data1
= UMISR1;
/* Read UMISR1 content*/
data2
= UMISR2;
/* Read UMISR2 content*/
data3
= UMISR3;
/* Read UMISR3 content*/
data4
= UMISR4;
/* Read UMISR4 content*/
UT0
= 0x80000034;
/* Reset AIE in UT0: Operation End */
UT0
= 0x00000000;
/* Reset UTE, MRE, MRV, AIS in UT0: Deselect Op. */
To exit from the margin read mode, a read reset operation must be executed.
30.6.3.2.3
ECC logic check
ECC logic can be checked by forcing the input of ECC logic: The 64 bits of data and the 8 bits of ECC
syndrome can be individually forced and they will drive simultaneously at the same value the ECC logic
of the whole page (2 double words).
The results of the ECC logic check can be verified by reading the MISR value.
The ECC logic check operation consists of the following sequence of events:
1. Set UT0[UTE] by writing the related password in UT0.
2. Write in UT1[DAI31–0] and UT2[DAI63–32] the double word input value.
3. Write in UT0[DSI7–0] the Syndrome Input value.
4. Select the ECC logic check: write a logic 1 to the UT0[EIE] bit.
5. Write a logic 1 to the UT0[AIE] bit to start the ECC logic check.
6. Wait until the UT0[AID] bit goes high.
7. Compare UMISR0–4 content with the expected result.
8. Write a logic 0 to the UT0[AIE] bit.
Notice that when UT0[AID] is low, UMISR0–4, UT1–2, and bits MRE, MRV, EIE, AIS, and DSI7–0 of
UT0 are not accessible: reading returns indeterminate data and write has no effect.
Example 30-7. ECC logic check
UT0
= 0xF9F99999;
/* Set UTE in UT0: Enable User Test */
UT1
= 0x55555555;
/* Set DAI31-0 in UT1: Even Word Input Data */
UT2
= 0xAAAAAAAA;
/* Set DAI63-32 in UT2: Odd Word Input Data */
UT0
= 0x80FF0000;
/* Set DSI7-0 in UT0: Syndrome Input Data */
UT0
= 0x80FF0008;
/* Set EIE in UT0: Select ECC Logic Check */
UT0
= 0x80FF000A;
/* Set AIE in UT0: Operation Start */
do
/* Loop to wait for AID=1 */
{ tmp
= UT0;
/* Read UT0 */
} while ( !(tmp & 0x00000001) );
data0
= UMISR0;
/* Read UMISR0 content (expected 0x55555555) */
Summary of Contents for MPC5605BK
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Page 20: ...MPC5606BK Microcontroller Reference Manual Rev 2 20 Freescale Semiconductor...
Page 103: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 103 Clocks and power...
Page 645: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 643 Timers...
Page 715: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 713 ADC system...
Page 787: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 787 Memory...
Page 893: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 893 Integrity...
Page 943: ...MPC5606BK Microcontroller Reference Manual Rev 2 Freescale Semiconductor 943 Debug...