NXP Semiconductors MPC5605BK, Reference Manual

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Chapter 16 Enhanced Direct Memory Access (eDMA)
MPC5606BK Microcontroller Reference Manual, Rev. 2
260 Freescale Semiconductor
execute using the data captured during the bus error. If a bus error occurs on the last write prior to switching
to the next read sequence, the read sequence will execute before the channel is terminated due to the
destination bus error.
The occurrence of any type of error causes the DMA engine to stop the active channel and the appropriate
channel bit in the eDMA error register to be asserted. At the same time, the details of the error condition
are loaded into the EDMA_ESR. The major loop complete indicators, setting the transfer control
descriptor DONE flag and the possible assertion of an interrupt request, are not affected when an error is
detected. After the error status has been updated, the DMA engine continues to operate by servicing the
next appropriate channel. A channel that experiences an error condition is not automatically disabled. If a
channel is terminated by an error and then issues another service request before the error is fixed, that
channel will execute and terminate with the same error condition.
Offset: 0x0004 Access: Read
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R VLD 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 CPE ERRCHN[0:5] SAE SOE DAE DOE NCE SGE SBE DBE
W
RESET: 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 16-3. DMA Error Status (EDMA_ESR) Register
Table 16-3. EDMA_ESR field descriptions
Field Description
VLD Logical OR of all EDMA_ERL status bits.
0 No EDMA_ERL bits are set.
1 At least one EDMA_ERL bit is set indicating a valid error exists that has not been cleared.
CPE Channel Priority Error
0 No channel priority error.
1 The last recorded error was a configuration error in the channel priorities within a group.
All channel priorities within a group are not unique.
ERRCHN[0:5] Error Channel Number or Cancelled Channel Number
The channel number of the last recorded error (excluding GPE and CPE errors) or last
recorded transfer that was error cancelled.
SAE Source Address Error
0 No source address configuration error.
1 The last recorded error was a configuration error detected in the TCD.saddr field.
TCD.saddr is inconsistent with TCD.ssize.
SOE Source Offset Error
0 No source offset configuration error.
1 The last recorded error was a configuration error detected in the TCD.soff field. TCD.soff
is inconsistent with TCD.ssize.