NXP Semiconductors MPC5605BK, Reference Manual

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Chapter 17 eDMA Channel Multiplexer (DMA_MUX)
MPC5606BK Microcontroller Reference Manual, Rev. 2
302 Freescale Semiconductor
Once the eDMA request has been serviced, the peripheral will negate its request, effectively resetting the
gating mechanism until the peripheral reasserts its request AND
the next trigger event is seen. This means
that if a trigger is seen, but the peripheral is not requesting a transfer, that triggered will be ignored. This
situation is illustrated in
Figure 17-5 .
Figure 17-5. DMA_MUX channel triggering: Ignored trigger
This triggering capability may be used with any peripheral that supports eDMA transfers, and is most
useful for periodically polling external devices on a particular bus.
As an example, the transmit side of a DSPI is assigned to an eDMA channel with a trigger, as described
above. Once set up, the SPI will request eDMA transfers (presumably from memory) as long as its transmit
buffer is empty. By using a trigger on this channel, the DSPI transfers can be automatically performed
every 5

µs (as an example). On the receive side of the SPI, the SPI and eDMA can be configured to transfer
receive data into memory, effectively implementing a method to periodically read data from external
devices and transfer the results into memory without processor intervention.
A more detailed description of the capability of each trigger (such as resolution, or range of values) may
be found in
Chapter 27, Timers .
17.7.2 eDMA channels with no triggering capability
Channels 4–15 of the DMA_MUX provide the normal routing functionality as described in Section 17.3,
Modes of operation .
Periph Request
Trigger
DMA Request